Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's

Ming-Dou Ker; Chung-Yu Wu; Tao Cheng; Hun Hsien Chang; Michael J.N. Wu; T. L. Yu

doi:10.1109/ICSICT.1995.499780

Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's

Ming-Dou Ker^*, Chung-Yu Wu, Tao Cheng, Hun Hsien Chang, Michael J.N. Wu, T. L. Yu

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to conference › Paper › peer-review

Abstract

A novel square-type layout style is proposed to efficiently implement CMOS output buffer with larger W/L ratio into a smaller silicon layout area than that of conventional finger-type layout style. Using this proposed layout style, the driving capability of CMOS output buffer in low-voltage submicron CMOS IC's can be effectively improved without increasing more layout area.

Original language	English
Pages	193-195
Number of pages	3
DOIs	https://doi.org/10.1109/ICSICT.1995.499780
State	Published - 1995
Event	Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology - Beijing, China Duration: 24 Oct 1995 → 28 Oct 1995

Conference

Conference	Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology
City	Beijing, China
Period	24/10/95 → 28/10/95

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10.1109/ICSICT.1995.499780

Cite this

Ker, M.-D., Wu, C.-Y., Cheng, T., Chang, H. H., Wu, M. J. N., & Yu, T. L. (1995). Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's. 193-195. Paper presented at Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China. https://doi.org/10.1109/ICSICT.1995.499780

@conference{16b9177d71a14bb69ceb19764df30be6,

title = "Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's",

abstract = "A novel square-type layout style is proposed to efficiently implement CMOS output buffer with larger W/L ratio into a smaller silicon layout area than that of conventional finger-type layout style. Using this proposed layout style, the driving capability of CMOS output buffer in low-voltage submicron CMOS IC's can be effectively improved without increasing more layout area.",

author = "Ming-Dou Ker and Chung-Yu Wu and Tao Cheng and Chang, {Hun Hsien} and Wu, {Michael J.N.} and Yu, {T. L.}",

year = "1995",

doi = "10.1109/ICSICT.1995.499780",

language = "English",

pages = "193--195",

note = "Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology ; Conference date: 24-10-1995 Through 28-10-1995",

}

Ker, M-D, Wu, C-Y, Cheng, T, Chang, HH, Wu, MJN & Yu, TL 1995, 'Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's', Paper presented at Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China, 24/10/95 - 28/10/95 pp. 193-195. https://doi.org/10.1109/ICSICT.1995.499780

Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's. / Ker, Ming-Dou; Wu, Chung-Yu; Cheng, Tao et al.
1995. 193-195 Paper presented at Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology, Beijing, China.

Research output: Contribution to conference › Paper › peer-review

TY - CONF

T1 - Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's

AU - Ker, Ming-Dou

AU - Wu, Chung-Yu

AU - Cheng, Tao

AU - Chang, Hun Hsien

AU - Wu, Michael J.N.

AU - Yu, T. L.

PY - 1995

Y1 - 1995

N2 - A novel square-type layout style is proposed to efficiently implement CMOS output buffer with larger W/L ratio into a smaller silicon layout area than that of conventional finger-type layout style. Using this proposed layout style, the driving capability of CMOS output buffer in low-voltage submicron CMOS IC's can be effectively improved without increasing more layout area.

AB - A novel square-type layout style is proposed to efficiently implement CMOS output buffer with larger W/L ratio into a smaller silicon layout area than that of conventional finger-type layout style. Using this proposed layout style, the driving capability of CMOS output buffer in low-voltage submicron CMOS IC's can be effectively improved without increasing more layout area.

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DO - 10.1109/ICSICT.1995.499780

M3 - Paper

AN - SCOPUS:0029452184

SP - 193

EP - 195

T2 - Proceedings of the 1995 4th International Conference on Solid-State and Integrated Circuit Technology

Y2 - 24 October 1995 through 28 October 1995

ER -

Efficient layout style of CMOS output buffer to improve driving capability of low-voltage submicron CMOS IC's

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Conference

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