Efficient bit-parallel subcircuit extraction using CUDA

Wafer processing technology has been improving rapidly. Moore's law has been exceeded as the number of transistors in a dense integrated circuit, now increases threefold or more, approximately every year. The integrated circuit has gone from very large scale to giga large scale. The extraction of subcircuits has therefore become computation-intensive. In this paper, we propose an efficient bit-parallel subcircuit extraction algorithm using graphic processing units. We conducted experimental trials and demonstrated that the proposed algorithm can achieve high throughput, suggesting practical applications in the extraction of subcircuits.