Effects of the Gate-to-Drain/Source Overlap on MOSFET Characteristics

T. Y. Chan, A. T. Wu, P. K. Ko, Chen-Ming Hu

Research output: Contribution to journalArticlepeer-review

24 Scopus citations

Abstract

The characteristics of MOSFET’s with different degrees of gate-to-drain overlap are studied. It is found that there exists a critical length of overlap below which the device hot-electron reliability will suffer. Since a few hundred angstroms change in the overlap length can cause the transition from good to poor reliability, devices designed for minimum gate-to-drain overlap might exhibit grossly nonuniform characteristics as a result of minor variations in the overlap structure across a wafer, such as that due to tilted implant. On the other hand, devices with larger overlap have a higher gate-to-drain/source capacitance. Therefore, there exists only a narrow margin within which an optimal compromise between device performance and characteristics can be achieved. This margin will shrink further as device dimensions are scaled down.

Original languageEnglish
Pages (from-to)326-328
Number of pages3
JournalIEEE Electron Device Letters
Volume8
Issue number7
DOIs
StatePublished - 1 Jan 1987

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