Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system

Wen Tai Lu; Chao-Hsin Chien; Ying Chang Lin; Ming Jui Yang; Tiao Yuan Huang

Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system

Wen Tai Lu^*, Chao-Hsin Chien, Ying Chang Lin, Ming Jui Yang, Tiao Yuan Huang

^*Corresponding author for this work

Institute of Electronics

Research output: Contribution to conference › Paper › peer-review

Abstract

The effects of post-deposition low temperature (∼ 400°C) NH ₃ (LTN) treatment on the characteristics of HfO₂/SiO ₂ gate stack with TiN gate electrode were studied in this work. HfO₂ films were deposited using AIXTRON Tricent® MOCVD system. Subsequently, the LTN treatment was implemented prior to post-deposition annealing (PDA) in order to avoid the growth of additional interfacial layer frequently seen as the high temperature nitridation technique is used. The effective electrical oxide thickness (EOT) for the annealed devices at 700°C with and without LTN was estimated to be about 2.2 nm and 2.3 nm without considering Quantum effect. It was found that the low temperature NH₃ treatment can not only effectively improve the characteristics of HfO ₂/SiO₂ stack gate dielectrics, such as C-V characteristics, frequency dispersion, trap generation rate, and dielectric breakdown voltage even at higher PDA temperature (∼ 700°C), but also reduce the resultant EOT.

Original language	English
Pages	434-442
Number of pages	9
State	Published - 2004
Event	Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium - Honolulu, HI, United States Duration: 3 Oct 2004 → 8 Oct 2004

Conference

Conference	Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium
Country/Territory	United States
City	Honolulu, HI
Period	3/10/04 → 8/10/04

Cite this

Lu, W. T., Chien, C.-H., Lin, Y. C., Yang, M. J., & Huang, T. Y. (2004). Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system. 434-442. Paper presented at Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium, Honolulu, HI, United States.

@conference{6a47e537e27a4cdba98825b3e7189eb9,

title = "Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system",

abstract = "The effects of post-deposition low temperature (∼ 400°C) NH 3 (LTN) treatment on the characteristics of HfO2/SiO 2 gate stack with TiN gate electrode were studied in this work. HfO2 films were deposited using AIXTRON Tricent{\textregistered} MOCVD system. Subsequently, the LTN treatment was implemented prior to post-deposition annealing (PDA) in order to avoid the growth of additional interfacial layer frequently seen as the high temperature nitridation technique is used. The effective electrical oxide thickness (EOT) for the annealed devices at 700°C with and without LTN was estimated to be about 2.2 nm and 2.3 nm without considering Quantum effect. It was found that the low temperature NH3 treatment can not only effectively improve the characteristics of HfO 2/SiO2 stack gate dielectrics, such as C-V characteristics, frequency dispersion, trap generation rate, and dielectric breakdown voltage even at higher PDA temperature (∼ 700°C), but also reduce the resultant EOT.",

author = "Lu, {Wen Tai} and Chao-Hsin Chien and Lin, {Ying Chang} and Yang, {Ming Jui} and Huang, {Tiao Yuan}",

year = "2004",

language = "English",

pages = "434--442",

note = "Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium ; Conference date: 03-10-2004 Through 08-10-2004",

}

Lu, WT, Chien, C-H, Lin, YC, Yang, MJ & Huang, TY 2004, 'Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system', Paper presented at Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium, Honolulu, HI, United States, 3/10/04 - 8/10/04 pp. 434-442.

Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system. / Lu, Wen Tai; Chien, Chao-Hsin; Lin, Ying Chang et al.
2004. 434-442 Paper presented at Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium, Honolulu, HI, United States.

Research output: Contribution to conference › Paper › peer-review

TY - CONF

T1 - Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system

AU - Lu, Wen Tai

AU - Chien, Chao-Hsin

AU - Lin, Ying Chang

AU - Yang, Ming Jui

AU - Huang, Tiao Yuan

PY - 2004

Y1 - 2004

N2 - The effects of post-deposition low temperature (∼ 400°C) NH 3 (LTN) treatment on the characteristics of HfO2/SiO 2 gate stack with TiN gate electrode were studied in this work. HfO2 films were deposited using AIXTRON Tricent® MOCVD system. Subsequently, the LTN treatment was implemented prior to post-deposition annealing (PDA) in order to avoid the growth of additional interfacial layer frequently seen as the high temperature nitridation technique is used. The effective electrical oxide thickness (EOT) for the annealed devices at 700°C with and without LTN was estimated to be about 2.2 nm and 2.3 nm without considering Quantum effect. It was found that the low temperature NH3 treatment can not only effectively improve the characteristics of HfO 2/SiO2 stack gate dielectrics, such as C-V characteristics, frequency dispersion, trap generation rate, and dielectric breakdown voltage even at higher PDA temperature (∼ 700°C), but also reduce the resultant EOT.

AB - The effects of post-deposition low temperature (∼ 400°C) NH 3 (LTN) treatment on the characteristics of HfO2/SiO 2 gate stack with TiN gate electrode were studied in this work. HfO2 films were deposited using AIXTRON Tricent® MOCVD system. Subsequently, the LTN treatment was implemented prior to post-deposition annealing (PDA) in order to avoid the growth of additional interfacial layer frequently seen as the high temperature nitridation technique is used. The effective electrical oxide thickness (EOT) for the annealed devices at 700°C with and without LTN was estimated to be about 2.2 nm and 2.3 nm without considering Quantum effect. It was found that the low temperature NH3 treatment can not only effectively improve the characteristics of HfO 2/SiO2 stack gate dielectrics, such as C-V characteristics, frequency dispersion, trap generation rate, and dielectric breakdown voltage even at higher PDA temperature (∼ 700°C), but also reduce the resultant EOT.

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M3 - Paper

AN - SCOPUS:17044375903

SP - 434

EP - 442

T2 - Dielectrics for Nanosystems: Materials Science, Processing, Reliability, and Manufacturing - Proceedings of the First International Symposium

Y2 - 3 October 2004 through 8 October 2004

ER -

Effects of low tempersture NH3 treatment on HfO2/SiO2 stack gate dielectrics fabricated by MOCVD system

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