Effect of intrinsic-parameter fluctuations on 16-nm-gate CMOS and current mirror circuit

Chun Yen Yiu, Yiming Li*, Ming Hung Han, Kuo Fu Lee, Thet Thet Khaing, Hui Wen Cheng, Zhong Cheng Su

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

4 Scopus citations

Abstract

This work, for the first time, estimates the influence of intrinsic-parameter fluctuations consisting of the metal-gate work-function fluctuation (WKF), the oxide-thickness fluctuation (OTF), the process-variation effect (PVE), and the random-dopant fluctuation (RDF) on 16-nm-gate complementary metal oxide semiconductor (CMOS) devices and circuit. Experimentally calibrated 3D device / circuit coupled simulation allows us to evaluate the effect of aforementioned fluctuations on CMOS devices' characteristics. Their impacts on the driving current of current mirror circuits are then explored. Variability suppression on RDF according to asymmetric doping profile engineering is thus advanced to mitigate the fluctuation. The normalized driving current fluctuations of current mirror circuit are reduced from 8.43% to 4.66% for the current mirror circuit made by NMOS and from 8.51% to 5.54% for the current mirror circuit made by PMOS, respectively. Furthermore, bulk FinFETs with an aspect ratio of 2 are implemented for suppressing these fluctuations.

Original languageEnglish
Title of host publication2010 10th IEEE Conference on Nanotechnology, NANO 2010
Pages798-801
Number of pages4
DOIs
StatePublished - 2010
Event2010 10th IEEE Conference on Nanotechnology, NANO 2010 - Ilsan, Gyeonggi-Do, Korea, Republic of
Duration: 17 Aug 201020 Aug 2010

Publication series

Name2010 10th IEEE Conference on Nanotechnology, NANO 2010

Conference

Conference2010 10th IEEE Conference on Nanotechnology, NANO 2010
Country/TerritoryKorea, Republic of
CityIlsan, Gyeonggi-Do
Period17/08/1020/08/10

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