ECO Timing Optimization with Data Paths and Clock Paths Considered

Jia Xiang Tang, Shih Hsu Huang, Jui Hung Hung

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

Metal-only ECO (engineering change order) is an important process for timing optimization after the layout has been completed. To fix timing violations, previous works use spare cells to revise data paths. Different from previous works, in this paper, we propose a new approach to fix timing violations by considering both data paths and clock paths. The proposed algorithm creates a candidate list (from both data paths and clock paths) based on current timing conditions and spare cell data, and then it calculates the costs to select the best revision method. The algorithm repeats until no further improvement can be made. Experiment results show that the proposed approach can achieve better timing results than previous works.

Original languageEnglish
Title of host publicationISPACS 2021 - International Symposium on Intelligent Signal Processing and Communication Systems
Subtitle of host publication5G Dream to Reality, Proceeding
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781665419512
DOIs
StatePublished - 2021
Event2021 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2021 - Hualien, Taiwan
Duration: 16 Nov 202119 Nov 2021

Publication series

NameISPACS 2021 - International Symposium on Intelligent Signal Processing and Communication Systems: 5G Dream to Reality, Proceeding

Conference

Conference2021 International Symposium on Intelligent Signal Processing and Communication Systems, ISPACS 2021
Country/TerritoryTaiwan
CityHualien
Period16/11/2119/11/21

Keywords

  • Buffer Insertion
  • Gate Sizing
  • Spare Cells
  • Timing Optimization
  • Timing Violations

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