TY - JOUR
T1 - Dual-output switched-capacitor DC–DC converter with pseudo-three-phase swap-and-cross control and amplitude modulation mechanism
AU - Chen, Chia Min
AU - Su, Chung Cheng
AU - Chou, Fang Ting
AU - Hung, Chung-Chih
N1 - Publisher Copyright:
© 2018, Springer Science+Business Media, LLC, part of Springer Nature.
PY - 2018/6/1
Y1 - 2018/6/1
N2 - This paper presents an inductorless dual-output switched-capacitor DC–DC converter employing pseudo-three-phase swap-and-cross control (PTPSCC) and an amplitude modulation mechanism (AMM). The AMM circuit scales the amplitudes of the driving signals for the switches according to the loading conditions in order to minimize switching losses. To reduce output ripples, average charge distribution, and improve regulation, the PTPSCC circuit continuously switches power transistors to deliver enough charge to the outputs by keeping at least one flying capacitor connected to each output. The switched capacitor DC–DC converter was implemented in a standard 0.18-μm 3.3-V CMOS process. Measurements were used to verify that the proposed converter provides dual independently regulated output voltages without cross regulation. The two outputs were regulated at 2.5 and 0.8 V with input ranges of 1.7–2 V. The maximum output loading was 100 mA for both outputs. A power efficiency of 90.5% was achieved at a maximum total output power of 330 mW with a switching frequency of 500 kHz, and a maximum power efficiency of 92.1% was achieved for a total output power of 210 mW. The maximal peak-to-peak output ripple voltages for the two outputs at 100 mA load currents were suppressed to below 26 and 20 mV, respectively.
AB - This paper presents an inductorless dual-output switched-capacitor DC–DC converter employing pseudo-three-phase swap-and-cross control (PTPSCC) and an amplitude modulation mechanism (AMM). The AMM circuit scales the amplitudes of the driving signals for the switches according to the loading conditions in order to minimize switching losses. To reduce output ripples, average charge distribution, and improve regulation, the PTPSCC circuit continuously switches power transistors to deliver enough charge to the outputs by keeping at least one flying capacitor connected to each output. The switched capacitor DC–DC converter was implemented in a standard 0.18-μm 3.3-V CMOS process. Measurements were used to verify that the proposed converter provides dual independently regulated output voltages without cross regulation. The two outputs were regulated at 2.5 and 0.8 V with input ranges of 1.7–2 V. The maximum output loading was 100 mA for both outputs. A power efficiency of 90.5% was achieved at a maximum total output power of 330 mW with a switching frequency of 500 kHz, and a maximum power efficiency of 92.1% was achieved for a total output power of 210 mW. The maximal peak-to-peak output ripple voltages for the two outputs at 100 mA load currents were suppressed to below 26 and 20 mV, respectively.
KW - Amplitude modulation mechanism
KW - CMOS voltage reference
KW - Charge-pump regulator
KW - Output ripple voltage
KW - Pseudo-three-phase swap-and-cross control
KW - Switched-capacitor DC–DC converter
UR - http://www.scopus.com/inward/record.url?scp=85043366814&partnerID=8YFLogxK
U2 - 10.1007/s10470-018-1147-z
DO - 10.1007/s10470-018-1147-z
M3 - Article
AN - SCOPUS:85043366814
SN - 0925-1030
VL - 95
SP - 523
EP - 540
JO - Analog Integrated Circuits and Signal Processing
JF - Analog Integrated Circuits and Signal Processing
IS - 3
ER -