Dual-band mixer design

Mei Fen Chou; Kuei-Ann Wen; Chun Yen Chang

doi:10.1093/ietele/e88-c.6.1280

Dual-band mixer design

Mei Fen Chou^*, Kuei-Ann Wen, Chun Yen Chang

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

Abstract

This paper presents a dual-band mixer equipped with a dual-band load using current combine technique to minimize chip area by sharing inductors for each frequency band. A systematic design methodology for the current combine load based on parasitic effect considerations is also developed. By following the proposed design procedure, the load inductance and combine capacitance for the dual-band mixer can be easily determined. A 2.4/5.2-GHz CMOS mixer design has been implemented to demonstrate the feasibility of the design technique.

Original language	English
Pages (from-to)	1280-1284
Number of pages	5
Journal	IEICE Transactions on Electronics
Volume	E88-C
Issue number	6
DOIs	https://doi.org/10.1093/ietele/e88-c.6.1280
State	Published - 1 Jan 2005

Keywords

Current combine
Dual-band mixer

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10.1093/ietele/e88-c.6.1280

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AB - This paper presents a dual-band mixer equipped with a dual-band load using current combine technique to minimize chip area by sharing inductors for each frequency band. A systematic design methodology for the current combine load based on parasitic effect considerations is also developed. By following the proposed design procedure, the load inductance and combine capacitance for the dual-band mixer can be easily determined. A 2.4/5.2-GHz CMOS mixer design has been implemented to demonstrate the feasibility of the design technique.

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Dual-band mixer design

Abstract

Keywords

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