Distributed Sorting Architecture on Multiple FPGA

Yi Da Hsin; Yen Shi Kuo; Bo Cheng Lai

doi:10.1109/VLSI-DAT54769.2022.9768057

Distributed Sorting Architecture on Multiple FPGA

Yi Da Hsin, Yen Shi Kuo, Bo Cheng Lai

Department of Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

FPGA has demonstrated promising performance in high throughput data sorting. Data compression techniques are adopted to exploit the redundant information between subsequent values in a sorted dataset. However, the standalone FPGA design inhibits the scalability to handle the growing dataset. Moreover, previous data compression techniques in data sorting lack versatility to support various ranges of data. This paper proposes the design of a distributed sorting accelerator on multiple FPGAs and introduce a Configurable Compressed Array to handle the various data widths. The experimental results have shown that the proposed design attains 3.69x enhancement when compared to the previous design.

Original language	English
Title of host publication	2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9781665409216
DOIs	https://doi.org/10.1109/VLSI-DAT54769.2022.9768057
State	Published - 2022
Event	2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Hsinchu, Taiwan Duration: 18 Apr 2022 → 21 Apr 2022

Publication series

Name	2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings

Conference

Conference	2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022
Country/Territory	Taiwan
City	Hsinchu
Period	18/04/22 → 21/04/22

Keywords

big data
compression technique
distributed computing architecture
FPGA
sort

Access to Document

10.1109/VLSI-DAT54769.2022.9768057

Cite this

Hsin, Y. D., Kuo, Y. S., & Lai, B. C. (2022). Distributed Sorting Architecture on Multiple FPGA. In 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings (2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-DAT54769.2022.9768057

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title = "Distributed Sorting Architecture on Multiple FPGA",

abstract = "FPGA has demonstrated promising performance in high throughput data sorting. Data compression techniques are adopted to exploit the redundant information between subsequent values in a sorted dataset. However, the standalone FPGA design inhibits the scalability to handle the growing dataset. Moreover, previous data compression techniques in data sorting lack versatility to support various ranges of data. This paper proposes the design of a distributed sorting accelerator on multiple FPGAs and introduce a Configurable Compressed Array to handle the various data widths. The experimental results have shown that the proposed design attains 3.69x enhancement when compared to the previous design.",

keywords = "big data, compression technique, distributed computing architecture, FPGA, sort",

author = "Hsin, {Yi Da} and Kuo, {Yen Shi} and Lai, {Bo Cheng}",

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year = "2022",

doi = "10.1109/VLSI-DAT54769.2022.9768057",

language = "English",

series = "2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings",

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Hsin, YD, Kuo, YS & Lai, BC 2022, Distributed Sorting Architecture on Multiple FPGA. in 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings. 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022, Hsinchu, Taiwan, 18/04/22. https://doi.org/10.1109/VLSI-DAT54769.2022.9768057

Distributed Sorting Architecture on Multiple FPGA. / Hsin, Yi Da; Kuo, Yen Shi; Lai, Bo Cheng.

2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2022. (2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Kuo, Yen Shi

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N2 - FPGA has demonstrated promising performance in high throughput data sorting. Data compression techniques are adopted to exploit the redundant information between subsequent values in a sorted dataset. However, the standalone FPGA design inhibits the scalability to handle the growing dataset. Moreover, previous data compression techniques in data sorting lack versatility to support various ranges of data. This paper proposes the design of a distributed sorting accelerator on multiple FPGAs and introduce a Configurable Compressed Array to handle the various data widths. The experimental results have shown that the proposed design attains 3.69x enhancement when compared to the previous design.

AB - FPGA has demonstrated promising performance in high throughput data sorting. Data compression techniques are adopted to exploit the redundant information between subsequent values in a sorted dataset. However, the standalone FPGA design inhibits the scalability to handle the growing dataset. Moreover, previous data compression techniques in data sorting lack versatility to support various ranges of data. This paper proposes the design of a distributed sorting accelerator on multiple FPGAs and introduce a Configurable Compressed Array to handle the various data widths. The experimental results have shown that the proposed design attains 3.69x enhancement when compared to the previous design.

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KW - compression technique

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M3 - Conference contribution

AN - SCOPUS:85130436742

T3 - 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings

BT - 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

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Hsin YD, Kuo YS, Lai BC. Distributed Sorting Architecture on Multiple FPGA. In 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2022. (2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings). doi: 10.1109/VLSI-DAT54769.2022.9768057

Distributed Sorting Architecture on Multiple FPGA

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