TY - JOUR
T1 - Digital Buck Converter with Switching Loss Reduction Scheme for Light Load Efficiency Enhancement
AU - Wu, Chung Shiang
AU - Lee, Hui Hsuan
AU - Chen, Po-Hung
AU - Hwang, Wei
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2017/2
Y1 - 2017/2
N2 - In this brief, we present a digital pulsewidth modulation buck converter with a switching loss reduction scheme to improve conversion efficiency at light load conditions. The proposed switching loss reduction scheme combines power-stage voltage swing scaling, transistor width scaling, and controller voltage scaling to reduce the dynamic power dissipation of the system. The power-stage voltage swing scaling also reduces the inductor current ripple at light load conditions, which extends the available output current range in the continuous conduction mode (CCM). A duty ratio estimation mechanism is implemented to provide a modulated signal with the correct duty ratio to control the output voltage. Experimental results demonstrate a 38% conversion efficiency improvement at a 50-$\mu \text{A}$ output current. In addition, the proposed circuit achieves a 96% peak efficiency with an output current ranging from 20 $\mu \text{A}$ to 30 mA in the CCM operation.
AB - In this brief, we present a digital pulsewidth modulation buck converter with a switching loss reduction scheme to improve conversion efficiency at light load conditions. The proposed switching loss reduction scheme combines power-stage voltage swing scaling, transistor width scaling, and controller voltage scaling to reduce the dynamic power dissipation of the system. The power-stage voltage swing scaling also reduces the inductor current ripple at light load conditions, which extends the available output current range in the continuous conduction mode (CCM). A duty ratio estimation mechanism is implemented to provide a modulated signal with the correct duty ratio to control the output voltage. Experimental results demonstrate a 38% conversion efficiency improvement at a 50-$\mu \text{A}$ output current. In addition, the proposed circuit achieves a 96% peak efficiency with an output current ranging from 20 $\mu \text{A}$ to 30 mA in the CCM operation.
KW - Controller voltage scaling
KW - Switching loss reduction
KW - digital buck converter
KW - power-stage voltage swing scaling
UR - http://www.scopus.com/inward/record.url?scp=84981713432&partnerID=8YFLogxK
U2 - 10.1109/TVLSI.2016.2592537
DO - 10.1109/TVLSI.2016.2592537
M3 - Article
AN - SCOPUS:84981713432
SN - 1063-8210
VL - 25
SP - 783
EP - 787
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 2
M1 - 7527660
ER -