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Dielectric Layer Design of Bilayer Ferroelectric and Antiferroelectric Tunneling Junctions Toward 3D NAND-Compatible Architecture
K. Y. Hsiang, C. Y. Liao, J. H. Liu, C. Y. Lin, J. Y. Lee, Z. F. Lou, F. S. Chang, W. C. Ray, Z. X. Li, H. C. Tseng, C. C. Wang, M. H. Liao, T. H. Hou, M. H. Lee
Research output: Contribution to journal › Article › peer-review
1
Scopus
citations