Dielectric Layer Design of Bilayer Ferroelectric and Antiferroelectric Tunneling Junctions Toward 3D NAND-Compatible Architecture

K. Y. Hsiang, C. Y. Liao, J. H. Liu, C. Y. Lin, J. Y. Lee, Z. F. Lou, F. S. Chang, W. C. Ray, Z. X. Li, H. C. Tseng, C. C. Wang, M. H. Liao, T. H. Hou, M. H. Lee*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

4 Scopus citations

Abstract

The 3D vertical ferroelectric tunneling junction (FTJ) of bilayer antiferroelectric (AFE) Hf1-xZrxO2(HZO) and Al2O3 has been demonstrated for NAND-compatible feasibility. A bilayer-type FTJ is explored for the designs of the dielectric interlayer Al2O3 0 nm to 4 nm and the ferroelectric type, while the current mechanism is revealed. The multilevel AFE-FTJ is exhibited for both the Program and Erase operations and realizes a synaptic device. High-density emerging memory and computing-in-memory (CiM) are in high demanded for the future era and can be feasible by the proposed vertical FTJ.

Original languageEnglish
Pages (from-to)1850-1853
Number of pages4
JournalIeee Electron Device Letters
Volume43
Issue number11
DOIs
StatePublished - 1 Nov 2022

Keywords

  • Ferroelectric
  • antiferroelectric

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