TY - GEN
T1 - Device Performance of 2D Layered Material Transistors and Their Challenges
T2 - 2nd IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018
AU - Liang, Gengchiau
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/7/26
Y1 - 2018/7/26
N2 - In this work, we will show the details of device performance of FETs based on black phosphorus and compared to Si UTB structures. Furthermore, we also report the ultimate voltage scalability of double gate ultra-thin body FETs employing materials ranging from group IV, III-V to 2-dimensional (2D) materials based on ITRS for high performance and low operating power applications. We will discuss the potentials using these 2D layered materials in FETs and their challenges.
AB - In this work, we will show the details of device performance of FETs based on black phosphorus and compared to Si UTB structures. Furthermore, we also report the ultimate voltage scalability of double gate ultra-thin body FETs employing materials ranging from group IV, III-V to 2-dimensional (2D) materials based on ITRS for high performance and low operating power applications. We will discuss the potentials using these 2D layered materials in FETs and their challenges.
KW - MOSFET and 2D materials
UR - http://www.scopus.com/inward/record.url?scp=85051467528&partnerID=8YFLogxK
U2 - 10.1109/EDTM.2018.8421444
DO - 10.1109/EDTM.2018.8421444
M3 - Conference contribution
AN - SCOPUS:85051467528
SN - 9781538637111
T3 - 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings
SP - 239
EP - 241
BT - 2018 IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2018 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 13 March 2018 through 16 March 2018
ER -