TY - GEN
T1 - Development of three-dimensional synaptic device and neuromorphic computing hardware
AU - Wang, I. Ting
AU - Chou, Teyuh
AU - Chiu, Li Wen
AU - Chang, Chih Cheng
AU - Hou, Tuo-Hung
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016
Y1 - 2016
N2 - To facilitate the development of low-cost, low-power, and high-density hardware neural networks, we have successfully developed a Ta/TaOx/TiO2/Ti RRAM-based synaptic device. The device exhibits numerous synaptic functions resembling those in biological synapses, including synaptic plasticity of potentiation and depression, spike-timing dependent plasticity, paired-pulse facilitation and a transition from short-term to long-term memory. We further demonstrate 3D high-density, high-connectivity integration of the Ta/TaOx/TiO2/Ti device, and the device exhibits excellent uniformity among interlayer and intralayer cells in a 4 × 4 3D two-layer cross-point array. Finally, we investigate the influence of nonlinearity of synaptic weight updates on neuromorphic computing. A state-independent training scheme is proposed to improve linearity and fault tolerance of training accuracy.
AB - To facilitate the development of low-cost, low-power, and high-density hardware neural networks, we have successfully developed a Ta/TaOx/TiO2/Ti RRAM-based synaptic device. The device exhibits numerous synaptic functions resembling those in biological synapses, including synaptic plasticity of potentiation and depression, spike-timing dependent plasticity, paired-pulse facilitation and a transition from short-term to long-term memory. We further demonstrate 3D high-density, high-connectivity integration of the Ta/TaOx/TiO2/Ti device, and the device exhibits excellent uniformity among interlayer and intralayer cells in a 4 × 4 3D two-layer cross-point array. Finally, we investigate the influence of nonlinearity of synaptic weight updates on neuromorphic computing. A state-independent training scheme is proposed to improve linearity and fault tolerance of training accuracy.
UR - http://www.scopus.com/inward/record.url?scp=85028657006&partnerID=8YFLogxK
U2 - 10.1109/ICSICT.2016.7998995
DO - 10.1109/ICSICT.2016.7998995
M3 - Conference contribution
AN - SCOPUS:85028657006
T3 - 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
SP - 620
EP - 623
BT - 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016 - Proceedings
A2 - Jiang, Yu-Long
A2 - Tang, Ting-Ao
A2 - Huang, Ru
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 13th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2016
Y2 - 25 October 2016 through 28 October 2016
ER -