Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes

Ming-Dou Ker; Wen Yi Chen

doi:10.1109/ISQED.2004.1283714

Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes

Ming-Dou Ker^*, Wen Yi Chen

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

14 Scopus citations

Abstract

Although the gate-driven (or gate-coupled) technique was reported to improve ESD robustness of NMOS devices, the over-gate-driven effect has been found to degrade ESD level. This effect makes the gate-driven technique hard to be well optimized in deep-submicron CMOS ICs. In this work, a new design is proposed to overcome such over-gate-driven effect by circuit design and to achieve the maximum ESD capability of devices. The experimental results have shown significant improvement on the machine-model (MM) ESD robustness of ESD protection circuit by this new proposed design. This new design is portable (process-migration) for applications in different CMOS processes without modifying the process step or mask layer.

Original language	English
Title of host publication	Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004
Publisher	IEEE Computer Society
Pages	445-450
Number of pages	6
ISBN (Print)	0769520936, 9780769520933
DOIs	https://doi.org/10.1109/ISQED.2004.1283714
State	Published - 2004
Event	Proceedings - 5th International Symposium on Quality Electronic Design, ISQED 2004 - San Jose, CA, United States Duration: 22 Mar 2004 → 24 Mar 2004

Publication series

Name	Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004

Conference

Conference	Proceedings - 5th International Symposium on Quality Electronic Design, ISQED 2004
Country/Territory	United States
City	San Jose, CA
Period	22/03/04 → 24/03/04

Access to Document

10.1109/ISQED.2004.1283714

Cite this

Ker, M.-D., & Chen, W. Y. (2004). Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes. In Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004 (pp. 445-450). (Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004). IEEE Computer Society. https://doi.org/10.1109/ISQED.2004.1283714

@inproceedings{89a958928bb947a6a6ccd764640e0b02,

title = "Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes",

abstract = "Although the gate-driven (or gate-coupled) technique was reported to improve ESD robustness of NMOS devices, the over-gate-driven effect has been found to degrade ESD level. This effect makes the gate-driven technique hard to be well optimized in deep-submicron CMOS ICs. In this work, a new design is proposed to overcome such over-gate-driven effect by circuit design and to achieve the maximum ESD capability of devices. The experimental results have shown significant improvement on the machine-model (MM) ESD robustness of ESD protection circuit by this new proposed design. This new design is portable (process-migration) for applications in different CMOS processes without modifying the process step or mask layer.",

author = "Ming-Dou Ker and Chen, {Wen Yi}",

year = "2004",

doi = "10.1109/ISQED.2004.1283714",

language = "English",

isbn = "0769520936",

series = "Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004",

publisher = "IEEE Computer Society",

pages = "445--450",

booktitle = "Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004",

address = "美國",

note = "Proceedings - 5th International Symposium on Quality Electronic Design, ISQED 2004 ; Conference date: 22-03-2004 Through 24-03-2004",

}

Ker, M-D & Chen, WY 2004, Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes. in Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004. Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004, IEEE Computer Society, pp. 445-450, Proceedings - 5th International Symposium on Quality Electronic Design, ISQED 2004, San Jose, CA, United States, 22/03/04. https://doi.org/10.1109/ISQED.2004.1283714

Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes. / Ker, Ming-Dou; Chen, Wen Yi.
Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004. IEEE Computer Society, 2004. p. 445-450 (Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes

AU - Ker, Ming-Dou

AU - Chen, Wen Yi

PY - 2004

Y1 - 2004

N2 - Although the gate-driven (or gate-coupled) technique was reported to improve ESD robustness of NMOS devices, the over-gate-driven effect has been found to degrade ESD level. This effect makes the gate-driven technique hard to be well optimized in deep-submicron CMOS ICs. In this work, a new design is proposed to overcome such over-gate-driven effect by circuit design and to achieve the maximum ESD capability of devices. The experimental results have shown significant improvement on the machine-model (MM) ESD robustness of ESD protection circuit by this new proposed design. This new design is portable (process-migration) for applications in different CMOS processes without modifying the process step or mask layer.

AB - Although the gate-driven (or gate-coupled) technique was reported to improve ESD robustness of NMOS devices, the over-gate-driven effect has been found to degrade ESD level. This effect makes the gate-driven technique hard to be well optimized in deep-submicron CMOS ICs. In this work, a new design is proposed to overcome such over-gate-driven effect by circuit design and to achieve the maximum ESD capability of devices. The experimental results have shown significant improvement on the machine-model (MM) ESD robustness of ESD protection circuit by this new proposed design. This new design is portable (process-migration) for applications in different CMOS processes without modifying the process step or mask layer.

UR - http://www.scopus.com/inward/record.url?scp=2942637943&partnerID=8YFLogxK

U2 - 10.1109/ISQED.2004.1283714

DO - 10.1109/ISQED.2004.1283714

M3 - Conference contribution

AN - SCOPUS:2942637943

SN - 0769520936

SN - 9780769520933

T3 - Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004

SP - 445

EP - 450

BT - Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004

PB - IEEE Computer Society

T2 - Proceedings - 5th International Symposium on Quality Electronic Design, ISQED 2004

Y2 - 22 March 2004 through 24 March 2004

ER -

Design to avoid the over-gate-driven effect on ESD protection circuits in deep-submicron CMOS processes

Abstract

Publication series

Conference

Access to Document

Other files and links

Fingerprint

Cite this