Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in A 0.13-μM CMOS technology

Che Hao Chuang; Ming-Dou Ker

doi:10.1109/ISCAS.2004.1329337

Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in A 0.13-μM CMOS technology

Che Hao Chuang^*, Ming-Dou Ker

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

31 Scopus citations

Abstract

This paper presents a 1.2V/2.5V tolerant I/O buffer design with only thin gate-oxide devices. The novel floating N-well and gate-tracking circuits in mixed-voltage I/O buffer are proposed to overcome the problem of leakage current, which will occur in the conventional CMOS I/O buffer when using in the mixed-voltage I/O interfaces. The new proposed 1.2V/2.5V tolerant I/O buffer design has been successfully verified in a 0.13-μm salicided CMOS process, which can be also applied in other CMOS processes to serve different mixed-voltage I/O interfaces.

Original language	English
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	2
DOIs	https://doi.org/10.1109/ISCAS.2004.1329337
State	Published - 7 Sep 2004
Event	2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada Duration: 23 May 2004 → 26 May 2004

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title = "Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in A 0.13-μM CMOS technology",

abstract = "This paper presents a 1.2V/2.5V tolerant I/O buffer design with only thin gate-oxide devices. The novel floating N-well and gate-tracking circuits in mixed-voltage I/O buffer are proposed to overcome the problem of leakage current, which will occur in the conventional CMOS I/O buffer when using in the mixed-voltage I/O interfaces. The new proposed 1.2V/2.5V tolerant I/O buffer design has been successfully verified in a 0.13-μm salicided CMOS process, which can be also applied in other CMOS processes to serve different mixed-voltage I/O interfaces.",

author = "Chuang, {Che Hao} and Ming-Dou Ker",

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doi = "10.1109/ISCAS.2004.1329337",

language = "English",

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AU - Chuang, Che Hao

AU - Ker, Ming-Dou

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N2 - This paper presents a 1.2V/2.5V tolerant I/O buffer design with only thin gate-oxide devices. The novel floating N-well and gate-tracking circuits in mixed-voltage I/O buffer are proposed to overcome the problem of leakage current, which will occur in the conventional CMOS I/O buffer when using in the mixed-voltage I/O interfaces. The new proposed 1.2V/2.5V tolerant I/O buffer design has been successfully verified in a 0.13-μm salicided CMOS process, which can be also applied in other CMOS processes to serve different mixed-voltage I/O interfaces.

AB - This paper presents a 1.2V/2.5V tolerant I/O buffer design with only thin gate-oxide devices. The novel floating N-well and gate-tracking circuits in mixed-voltage I/O buffer are proposed to overcome the problem of leakage current, which will occur in the conventional CMOS I/O buffer when using in the mixed-voltage I/O interfaces. The new proposed 1.2V/2.5V tolerant I/O buffer design has been successfully verified in a 0.13-μm salicided CMOS process, which can be also applied in other CMOS processes to serve different mixed-voltage I/O interfaces.

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DO - 10.1109/ISCAS.2004.1329337

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JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

Y2 - 23 May 2004 through 26 May 2004

ER -

Design on mixed-voltage-tolerant I/O interface with novel tracking circuits in A 0.13-μM CMOS technology

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