Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications

Ming-Dou Ker; Chien Hua Wu

doi:10.1109/ISCAS.2006.1693793

Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications

Ming-Dou Ker^*, Chien Hua Wu

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

6 Scopus citations

Abstract

A LVDS receiver with new data recovery design for flat-panel-display (FPD) link is presented. The new delay-selecting technique is used in LVDS receiver to reduce the circuit complexity and to save chip power for cost-efficient applications. The proposed LVDS receiver with an operation data rate of 1.25 Gb/s has been successfully verified in a 0.13-μm CMOS process, which can fully support the operation of FPD link with UXGA resolution.

Original language	English
Title of host publication	ISCAS 2006
Subtitle of host publication	2006 IEEE International Symposium on Circuits and Systems, Proceedings
Pages	5155-5158
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2006.1693793
State	Published - 2006
Event	ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece Duration: 21 May 2006 → 24 May 2006

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Conference

Conference	ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
Country/Territory	Greece
City	Kos
Period	21/05/06 → 24/05/06

Access to Document

10.1109/ISCAS.2006.1693793

Cite this

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title = "Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications",

abstract = "A LVDS receiver with new data recovery design for flat-panel-display (FPD) link is presented. The new delay-selecting technique is used in LVDS receiver to reduce the circuit complexity and to save chip power for cost-efficient applications. The proposed LVDS receiver with an operation data rate of 1.25 Gb/s has been successfully verified in a 0.13-μm CMOS process, which can fully support the operation of FPD link with UXGA resolution.",

author = "Ming-Dou Ker and Wu, {Chien Hua}",

year = "2006",

doi = "10.1109/ISCAS.2006.1693793",

language = "English",

isbn = "0780393902",

series = "Proceedings - IEEE International Symposium on Circuits and Systems",

pages = "5155--5158",

booktitle = "ISCAS 2006",

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Ker, M-D & Wu, CH 2006, Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications. in ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings., 1693793, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 5155-5158, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Kos, Greece, 21/05/06. https://doi.org/10.1109/ISCAS.2006.1693793

Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications. / Ker, Ming-Dou; Wu, Chien Hua.
ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings. 2006. p. 5155-5158 1693793 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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N2 - A LVDS receiver with new data recovery design for flat-panel-display (FPD) link is presented. The new delay-selecting technique is used in LVDS receiver to reduce the circuit complexity and to save chip power for cost-efficient applications. The proposed LVDS receiver with an operation data rate of 1.25 Gb/s has been successfully verified in a 0.13-μm CMOS process, which can fully support the operation of FPD link with UXGA resolution.

AB - A LVDS receiver with new data recovery design for flat-panel-display (FPD) link is presented. The new delay-selecting technique is used in LVDS receiver to reduce the circuit complexity and to save chip power for cost-efficient applications. The proposed LVDS receiver with an operation data rate of 1.25 Gb/s has been successfully verified in a 0.13-μm CMOS process, which can fully support the operation of FPD link with UXGA resolution.

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M3 - Conference contribution

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T3 - Proceedings - IEEE International Symposium on Circuits and Systems

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Design on LVDS receiver with new delay-selecting technique for UXGA flat panel display applications

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