Design of power-rail ESD clamp circuits with gate-leakage consideration in nanoscale CMOS technology

Physics & Astronomy

• clamps 92%
• rails 90%
• CMOS 68%
• leakage 63%
• electrostatics 58%
• integrated circuits 18%
• products 12%
• contact potentials 8%
• human body 7%
• specifications 6%
• assembly 5%
• manufacturing 5%
• chips 5%
• impedance 4%
• damage 4%
• causes 3%
• output 3%
• electric potential 3%

Engineering & Materials Science

• Electrostatic discharge 100%
• Clamping devices 85%
• Rails 65%
• Networks (circuits) 42%
• Integrated circuits 17%
• Leakage currents 6%
• Acoustic impedance 4%
• Specifications 4%
• Testing 3%
• Electric potential 3%