Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology

Ming-Dou Ker; Hung Tai Liao

doi:10.1109/ISCAS.2007.378207

Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology

Ming-Dou Ker^*, Hung Tai Liao

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

1 Scopus citations

Abstract

In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to support a higher operating speed under a lower power supply (1×VDD). However, the board-level voltage levels could be still in a higher voltage levels (2×VDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-voltage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications.

Original language	English
Article number	4252836
Pages (from-to)	1121-1124
Number of pages	4
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
DOIs	https://doi.org/10.1109/ISCAS.2007.378207
State	Published - 27 Sep 2007
Event	2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States Duration: 27 May 2007 → 30 May 2007

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title = "Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology",

abstract = "In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to support a higher operating speed under a lower power supply (1×VDD). However, the board-level voltage levels could be still in a higher voltage levels (2×VDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-voltage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications.",

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AU - Liao, Hung Tai

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AB - In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to support a higher operating speed under a lower power supply (1×VDD). However, the board-level voltage levels could be still in a higher voltage levels (2×VDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-voltage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications.

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Design of mixed-voltage crystal oscillator circuit in low-voltage CMOS technology

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