In the nanometer-scale CMOS technology, the gate-oxide thickness has been scaled down to support a higher operating speed under a lower power supply (1×VDD). However, the board-level voltage levels could be still in a higher voltage levels (2×VDD, or even more) for compatible to some earlier interface specifications in a microelectronics system. The I/O interface circuits have been designed with consideration on the gate-oxide reliability in such mixed-voltage applications. In this work, a new mixed-voltage crystal oscillator circuit realized with low-voltage CMOS devices is proposed without suffering the gate-oxide reliability issue. The proposed mixed-voltage crystal oscillator circuit, which is one of the key I/O cells in a cell library, has been designed and verified in a 90-nm 1-V CMOS process to serve 1/1.8-V mixed-voltage interface applications.
|Number of pages||4|
|Journal||Proceedings - IEEE International Symposium on Circuits and Systems|
|State||Published - 27 Sep 2007|
|Event||2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007 - New Orleans, LA, United States|
Duration: 27 May 2007 → 30 May 2007