Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing

Ming Chun Hong; Yi Hui Su; Guan Long Chen; Yu Chen Hsin; Yao Jen Chang; Kuan Ming Chen; Shan Yi Yang; I. Jung Wang; Sk Ziaur Rahaman; Hsin Han Lee; Jeng Hua Wei; Shyh Shyuan Sheu; Wei Chung Lo; Shih Chieh Chang; Tuo Hung Hou

doi:10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing

Ming Chun Hong, Yi Hui Su, Guan Long Chen, Yu Chen Hsin, Yao Jen Chang, Kuan Ming Chen, Shan Yi Yang, I. Jung Wang, Sk Ziaur Rahaman, Hsin Han Lee, Jeng Hua Wei, Shyh Shyuan Sheu, Wei Chung Lo, Shih Chieh Chang, Tuo Hung Hou^*

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

In contrast to the low-RA STT-MRAM for memory applications, high-RA (> 500 Ω-μ m2) STT-MRAM with high cell resistance (1 M Ω) is required to support energy-efficient in-memory computing beyond 10 POPS/W. Scaling the coercive magnetic field and cell dimension and increasing the MgO thickness are found critical for enlarging RA and write margin.

Original language	English
Title of host publication	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350334166
DOIs	https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453
State	Published - 2023
Event	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Hsinchu, Taiwan Duration: 17 Apr 2023 → 20 Apr 2023

Publication series

Name	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

Conference

Conference	2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023
Country/Territory	Taiwan
City	Hsinchu
Period	17/04/23 → 20/04/23

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10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

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Hong, M. C., Su, Y. H., Chen, G. L., Hsin, Y. C., Chang, Y. J., Chen, K. M., Yang, S. Y., Wang, I. J., Rahaman, S. Z., Lee, H. H., Wei, J. H., Sheu, S. S., Lo, W. C., Chang, S. C., & Hou, T. H. (2023). Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing. In 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

Hong, Ming Chun ; Su, Yi Hui ; Chen, Guan Long et al. / Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing. 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings).

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title = "Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing",

abstract = "In contrast to the low-RA STT-MRAM for memory applications, high-RA (> 500 Ω-μ m2) STT-MRAM with high cell resistance (1 M Ω) is required to support energy-efficient in-memory computing beyond 10 POPS/W. Scaling the coercive magnetic field and cell dimension and increasing the MgO thickness are found critical for enlarging RA and write margin.",

author = "Hong, {Ming Chun} and Su, {Yi Hui} and Chen, {Guan Long} and Hsin, {Yu Chen} and Chang, {Yao Jen} and Chen, {Kuan Ming} and Yang, {Shan Yi} and Wang, {I. Jung} and Rahaman, {Sk Ziaur} and Lee, {Hsin Han} and Wei, {Jeng Hua} and Sheu, {Shyh Shyuan} and Lo, {Wei Chung} and Chang, {Shih Chieh} and Hou, {Tuo Hung}",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 ; Conference date: 17-04-2023 Through 20-04-2023",

year = "2023",

doi = "10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453",

language = "English",

series = "2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings",

address = "美國",

}

Hong, MC, Su, YH, Chen, GL, Hsin, YC, Chang, YJ, Chen, KM, Yang, SY, Wang, IJ, Rahaman, SZ, Lee, HH, Wei, JH, Sheu, SS, Lo, WC, Chang, SC & Hou, TH 2023, Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing. in 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings, Institute of Electrical and Electronics Engineers Inc., 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023, Hsinchu, Taiwan, 17/04/23. https://doi.org/10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing. / Hong, Ming Chun; Su, Yi Hui; Chen, Guan Long et al.
2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing

AU - Hong, Ming Chun

AU - Su, Yi Hui

AU - Chen, Guan Long

AU - Hsin, Yu Chen

AU - Chang, Yao Jen

AU - Chen, Kuan Ming

AU - Yang, Shan Yi

AU - Wang, I. Jung

AU - Rahaman, Sk Ziaur

AU - Lee, Hsin Han

AU - Wei, Jeng Hua

AU - Sheu, Shyh Shyuan

AU - Lo, Wei Chung

AU - Chang, Shih Chieh

AU - Hou, Tuo Hung

PY - 2023

Y1 - 2023

N2 - In contrast to the low-RA STT-MRAM for memory applications, high-RA (> 500 Ω-μ m2) STT-MRAM with high cell resistance (1 M Ω) is required to support energy-efficient in-memory computing beyond 10 POPS/W. Scaling the coercive magnetic field and cell dimension and increasing the MgO thickness are found critical for enlarging RA and write margin.

AB - In contrast to the low-RA STT-MRAM for memory applications, high-RA (> 500 Ω-μ m2) STT-MRAM with high cell resistance (1 M Ω) is required to support energy-efficient in-memory computing beyond 10 POPS/W. Scaling the coercive magnetic field and cell dimension and increasing the MgO thickness are found critical for enlarging RA and write margin.

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U2 - 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

DO - 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

M3 - Conference contribution

AN - SCOPUS:85162969342

T3 - 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

BT - 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023

Y2 - 17 April 2023 through 20 April 2023

ER -

Hong MC, Su YH, Chen GL, Hsin YC, Chang YJ, Chen KM et al. Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing. In 2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2023. (2023 International VLSI Symposium on Technology, Systems and Applications, VLSI-TSA/VLSI-DAT 2023 - Proceedings). doi: 10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134453

Design of High-RA STT-MRAM for Future Energy-Efficient In-Memory Computing

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