Design of ESD protection for RF CMOS power amplifier with inductor in matching network

Shiang Yu Tsai*, Chun Yu Lin, Li Wei Chu, Ming-Dou Ker

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    4 Scopus citations

    Abstract

    Due to the potential for mass production, CMOS technologies have been widely used to implement radio-frequency integrated circuits (RF ICs). Electrostatic discharge (ESD), which is one of the most important reliability issues in CMOS technologies, must be considered in RF ICs. In this work, an on-chip ESD protection design for RF power amplifier (PA) was presented. The ESD protection design consisted of an inductor in the matching network of PA. The PA with this ESD protection had been designed and fabricated in a 65-nm CMOS process. The ESD-protected PA can sustain over 4-kV human-body-mode (HBM) ESD stress, while the unprotected PA was degraded after 1-kV HBM ESD stress.

    Original languageEnglish
    Title of host publication2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
    Pages467-470
    Number of pages4
    DOIs
    StatePublished - 1 Dec 2012
    Event2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012 - Kaohsiung, Taiwan
    Duration: 2 Dec 20125 Dec 2012

    Publication series

    NameIEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS

    Conference

    Conference2012 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2012
    Country/TerritoryTaiwan
    CityKaohsiung
    Period2/12/125/12/12

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