Design of CMOS Analog Front-End Local-Field Potential Chopper Amplifier With Stimulation Artifact Tolerance for Real-Time Closed-Loop Deep Brain Stimulation SoC Applications

A CMOS analog front-end (AFE) local-field potential (LFP) chopper amplifier with stimulation artifact tolerance, improved right-leg driven (RLD) circuit, and improved auxiliary path is proposed. In the proposed CMOS AFE LFP chopper amplifier, common-mode artifact voltage (CMAV) and differential-mode artifact voltage (DMAV) removal using the analog template removal method are proposed to achieve good signal linearity during stimulation. An improved auxiliary path is employed to boost the input impedance and allow the negative stimulation artifact voltage passing through. The common-mode noise is suppressed by the improved RLD circuit. The chip is implemented in 0.18-{{bf mu m}} CMOS technology and the total chip area is 5.46-mm2. With the improved auxiliary path, the measured input impedance is larger than 133 M{bm{Omega}} in the signal bandwidth and reaches 8.2 G{bm{Omega}} at DC. With the improved RLD circuit, the measured CMRR is 131 - 144 dB in the signal bandwidth. Under 60-μs pulse width and 130-Hz constant current stimulation (CCS) with ±1-V CMAV and ±50-mV DMAV, the measured THD at the SC Amp output of fabricated AFE LFP chopper amplifier is 1.28%. The measurement results of In vitro agar tests have shown that with ±1.6-mA CCS pulses injecting to agar, the measured THD is 1.69%. Experimental results of both electrical and agar tests have verified that the proposed AFE LFP chopper amplifier has good stimulation artifact tolerance. The proposed CMOS AFE LFP chopper amplifier with analog template removal method is suitable for real-time closed-loop deep drain stimulation (DBS) SoC applications.