Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application

Li Wei Chu; Po-Tsun Liu; Ming-Dou Ker; Guang Ting Zheng; Yu Hsuan Li; Chung Hung Kuo; Chun Huai Li; Yao Jen Hsieh; Chun Ting Liu

doi:10.1889/1.3499953

Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application

Li Wei Chu^*, Po-Tsun Liu, Ming-Dou Ker, Guang Ting Zheng, Yu Hsuan Li, Chung Hung Kuo, Chun Huai Li, Yao Jen Hsieh, Chun Ting Liu

^*Corresponding author for this work

Department of Photonics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

A new analog pixel memory cell realized in a 3-μm LTPS technology is proposed to achieve low-power consumption for TFT-LCDs. By employing the inversion data in storage capacitor with complementary source follower, the frame rate to refresh the static image can be reduced from 60Hz to 3Hz with output decay only less than 0.075V under the input data from IV to 4V.

Original language	English
Title of host publication	48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
Pages	1363-1366
Number of pages	4
Volume	41
Edition	1
DOIs	https://doi.org/10.1889/1.3499953
State	Published - 1 Dec 2010
Event	48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010 - Seattle, WA, United States Duration: 23 May 2010 → 28 May 2010

Conference

Conference	48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010
Country/Territory	United States
City	Seattle, WA
Period	23/05/10 → 28/05/10

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10.1889/1.3499953

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Chu, L. W., Liu, P-T., Ker, M-D., Zheng, G. T., Li, Y. H., Kuo, C. H., Li, C. H., Hsieh, Y. J., & Liu, C. T. (2010). Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application. In 48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010 (1 ed., Vol. 41, pp. 1363-1366) https://doi.org/10.1889/1.3499953

@inproceedings{f2a1ade2bb434d4db97165c5211f6aac,

title = "Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application",

abstract = "A new analog pixel memory cell realized in a 3-μm LTPS technology is proposed to achieve low-power consumption for TFT-LCDs. By employing the inversion data in storage capacitor with complementary source follower, the frame rate to refresh the static image can be reduced from 60Hz to 3Hz with output decay only less than 0.075V under the input data from IV to 4V.",

author = "Chu, {Li Wei} and Po-Tsun Liu and Ming-Dou Ker and Zheng, {Guang Ting} and Li, {Yu Hsuan} and Kuo, {Chung Hung} and Li, {Chun Huai} and Hsieh, {Yao Jen} and Liu, {Chun Ting}",

year = "2010",

month = dec,

day = "1",

doi = "10.1889/1.3499953",

language = "English",

volume = "41",

pages = "1363--1366",

booktitle = "48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010",

edition = "1",

note = "48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010 ; Conference date: 23-05-2010 Through 28-05-2010",

}

Chu, LW, Liu, P-T , Ker, M-D, Zheng, GT, Li, YH, Kuo, CH, Li, CH, Hsieh, YJ & Liu, CT 2010, Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application. in 48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010. 1 edn, vol. 41, pp. 1363-1366, 48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010, Seattle, WA, United States, 23/05/10. https://doi.org/10.1889/1.3499953

Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application. / Chu, Li Wei; Liu, Po-Tsun ; Ker, Ming-Dou et al.
48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010. Vol. 41 1. ed. 2010. p. 1363-1366.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application

AU - Chu, Li Wei

AU - Liu, Po-Tsun

AU - Ker, Ming-Dou

AU - Zheng, Guang Ting

AU - Li, Yu Hsuan

AU - Kuo, Chung Hung

AU - Li, Chun Huai

AU - Hsieh, Yao Jen

AU - Liu, Chun Ting

PY - 2010/12/1

Y1 - 2010/12/1

N2 - A new analog pixel memory cell realized in a 3-μm LTPS technology is proposed to achieve low-power consumption for TFT-LCDs. By employing the inversion data in storage capacitor with complementary source follower, the frame rate to refresh the static image can be reduced from 60Hz to 3Hz with output decay only less than 0.075V under the input data from IV to 4V.

AB - A new analog pixel memory cell realized in a 3-μm LTPS technology is proposed to achieve low-power consumption for TFT-LCDs. By employing the inversion data in storage capacitor with complementary source follower, the frame rate to refresh the static image can be reduced from 60Hz to 3Hz with output decay only less than 0.075V under the input data from IV to 4V.

UR - http://www.scopus.com/inward/record.url?scp=79251519364&partnerID=8YFLogxK

U2 - 10.1889/1.3499953

DO - 10.1889/1.3499953

M3 - Conference contribution

AN - SCOPUS:84863314406

VL - 41

SP - 1363

EP - 1366

BT - 48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010

T2 - 48th Annual SID Symposium, Seminar, and Exhibition 2010, Display Week 2010

Y2 - 23 May 2010 through 28 May 2010

ER -

Design of analog pixel memory circuit with low temperature polycrystalline silicon TFTs for low power application

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