Design of AC-coupled circuit for high-speed interconnects

Chun Wei Huang; Kai Jen Liu; Yu Jung Huang; Ming Kun Chen; Yi Lung Lin; Ming-Dou Ker

doi:10.1109/GHTCE.2012.6490130

Design of AC-coupled circuit for high-speed interconnects

Chun Wei Huang^*, Kai Jen Liu, Yu Jung Huang, Ming Kun Chen, Yi Lung Lin, Ming-Dou Ker

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

The scaling of semiconductor technology together with 3D IC stacking integration make it possible for many portable electronics to process large amount of multimedia data. AC-coupling enables chip placed face-to-face for signal transmission using close-field capacitive coupling. A high performance system design using AC coupled interconnect (ACCI) technology not only achieves shorter and faster interconnection between dies but also increases packaging density. This paper describes a chip-to-chip circuit design suitable for high-speed 3DIC interconnected applications. The AC-Coupled face-to-face (F2F) chip was simulated using HSPICE with TSMC 0.18-μm 1P6M CMOS technology process file under a 1.8 V supply voltage. The simulation results indicated the proposed circuit with the self-test characteristics can achieve differential signal transmission up to 2.5 Gbps.

Original language	English
Title of host publication	2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012
Pages	87-90
Number of pages	4
DOIs	https://doi.org/10.1109/GHTCE.2012.6490130
State	Published - 1 Dec 2012
Event	2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012 - Shenzhen, China Duration: 18 Nov 2012 → 20 Nov 2012

Publication series

Name	2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012

Conference

Conference	2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012
Country/Territory	China
City	Shenzhen
Period	18/11/12 → 20/11/12

Keywords

AC-Coupled
Differential signal transmission
High-speed interconnected
Three-dimensional integrated circuit (3D IC)

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10.1109/GHTCE.2012.6490130

Cite this

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title = "Design of AC-coupled circuit for high-speed interconnects",

abstract = "The scaling of semiconductor technology together with 3D IC stacking integration make it possible for many portable electronics to process large amount of multimedia data. AC-coupling enables chip placed face-to-face for signal transmission using close-field capacitive coupling. A high performance system design using AC coupled interconnect (ACCI) technology not only achieves shorter and faster interconnection between dies but also increases packaging density. This paper describes a chip-to-chip circuit design suitable for high-speed 3DIC interconnected applications. The AC-Coupled face-to-face (F2F) chip was simulated using HSPICE with TSMC 0.18-μm 1P6M CMOS technology process file under a 1.8 V supply voltage. The simulation results indicated the proposed circuit with the self-test characteristics can achieve differential signal transmission up to 2.5 Gbps.",

keywords = "AC-Coupled, Differential signal transmission, High-speed interconnected, Three-dimensional integrated circuit (3D IC)",

author = "Huang, {Chun Wei} and Liu, {Kai Jen} and Huang, {Yu Jung} and Chen, {Ming Kun} and Lin, {Yi Lung} and Ming-Dou Ker",

year = "2012",

month = dec,

day = "1",

doi = "10.1109/GHTCE.2012.6490130",

language = "English",

isbn = "9781467350853",

series = "2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012",

pages = "87--90",

booktitle = "2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012",

note = "2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012 ; Conference date: 18-11-2012 Through 20-11-2012",

}

Huang, CW, Liu, KJ, Huang, YJ, Chen, MK, Lin, YL & Ker, M-D 2012, Design of AC-coupled circuit for high-speed interconnects. in 2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012., 6490130, 2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012, pp. 87-90, 2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012, Shenzhen, China, 18/11/12. https://doi.org/10.1109/GHTCE.2012.6490130

Design of AC-coupled circuit for high-speed interconnects. / Huang, Chun Wei; Liu, Kai Jen; Huang, Yu Jung et al.
2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012. 2012. p. 87-90 6490130 (2012 IEEE Global High Tech Congress on Electronics, GHTCE 2012).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Liu, Kai Jen

AU - Huang, Yu Jung

AU - Chen, Ming Kun

AU - Lin, Yi Lung

AU - Ker, Ming-Dou

PY - 2012/12/1

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N2 - The scaling of semiconductor technology together with 3D IC stacking integration make it possible for many portable electronics to process large amount of multimedia data. AC-coupling enables chip placed face-to-face for signal transmission using close-field capacitive coupling. A high performance system design using AC coupled interconnect (ACCI) technology not only achieves shorter and faster interconnection between dies but also increases packaging density. This paper describes a chip-to-chip circuit design suitable for high-speed 3DIC interconnected applications. The AC-Coupled face-to-face (F2F) chip was simulated using HSPICE with TSMC 0.18-μm 1P6M CMOS technology process file under a 1.8 V supply voltage. The simulation results indicated the proposed circuit with the self-test characteristics can achieve differential signal transmission up to 2.5 Gbps.

AB - The scaling of semiconductor technology together with 3D IC stacking integration make it possible for many portable electronics to process large amount of multimedia data. AC-coupling enables chip placed face-to-face for signal transmission using close-field capacitive coupling. A high performance system design using AC coupled interconnect (ACCI) technology not only achieves shorter and faster interconnection between dies but also increases packaging density. This paper describes a chip-to-chip circuit design suitable for high-speed 3DIC interconnected applications. The AC-Coupled face-to-face (F2F) chip was simulated using HSPICE with TSMC 0.18-μm 1P6M CMOS technology process file under a 1.8 V supply voltage. The simulation results indicated the proposed circuit with the self-test characteristics can achieve differential signal transmission up to 2.5 Gbps.

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KW - Differential signal transmission

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KW - Three-dimensional integrated circuit (3D IC)

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Design of AC-coupled circuit for high-speed interconnects

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