Design of 2xVDD-tolerant I/O buffer with 1xVDD CMOS devices

Ming-Dou Ker*, Yan Liang Lin

*Corresponding author for this work

    Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

    12 Scopus citations

    Abstract

    A new 2xVDD-tolerant I/O buffer realized with only 1xVDD devices has been proposed and verified in a 0.18-μm CMOS process. With the dynamic source output technique and the new gate-controlled circuit, the new proposed I/O buffer can transmit and receive the signals with the voltage swing twice as high as the normal power supply voltage (VDD) without suffering gate-oxide reliability problem. The proposed 2xVDD-tolerant I/O circuit solution can be implemented in different nanoscale CMOS processes to meet the mixed-voltage interface applications in microelectronic systems.

    Original languageEnglish
    Title of host publication2009 IEEE Custom Integrated Circuits Conference, CICC '09
    Pages539-542
    Number of pages4
    DOIs
    StatePublished - 1 Dec 2009
    Event2009 IEEE Custom Integrated Circuits Conference, CICC '09 - San Jose, CA, United States
    Duration: 13 Sep 200916 Sep 2009

    Publication series

    NameProceedings of the Custom Integrated Circuits Conference
    ISSN (Print)0886-5930

    Conference

    Conference2009 IEEE Custom Integrated Circuits Conference, CICC '09
    Country/TerritoryUnited States
    CitySan Jose, CA
    Period13/09/0916/09/09

    Fingerprint

    Dive into the research topics of 'Design of 2xVDD-tolerant I/O buffer with 1xVDD CMOS devices'. Together they form a unique fingerprint.

    Cite this