Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit

Ming-Dou Ker; Chia Sheng Tsai

doi:10.1109/ISCAS.2003.1206197

Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit

Ming-Dou Ker^*, Chia Sheng Tsai

^*Corresponding author for this work

Research output: Contribution to journal › Conference article › peer-review

25 Scopus citations

Abstract

This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.

Original language	English
Journal	Proceedings - IEEE International Symposium on Circuits and Systems
Volume	5
DOIs	https://doi.org/10.1109/ISCAS.2003.1206197
State	Published - 14 Jul 2003
Event	Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand Duration: 25 May 2003 → 28 May 2003

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title = "Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit",

abstract = "This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.",

author = "Ming-Dou Ker and Tsai, {Chia Sheng}",

year = "2003",

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doi = "10.1109/ISCAS.2003.1206197",

language = "English",

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AU - Ker, Ming-Dou

AU - Tsai, Chia Sheng

PY - 2003/7/14

Y1 - 2003/7/14

N2 - This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.

AB - This paper presents a 2.5V/5V mixed-voltage CMOS I/O buffer that does not need a CMOS technology with a dual-oxide option and complex bias circuits. The proposed mixed-voltage I/O buffer with simpler circuit structure can overcome the problems of leakage current and gate-oxide reliability, which occurring in the conventional CMOS I/O buffer. In this work, the new proposed design has been realized in a 0.25-μm CMOS process, but it can be easily scaled toward 0.18-μm or 0.15-μm processes to serve a 1.8V/3.3V mixed-voltage I/O interface.

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U2 - 10.1109/ISCAS.2003.1206197

DO - 10.1109/ISCAS.2003.1206197

M3 - Conference article

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SN - 0271-4310

VL - 5

JO - Proceedings - IEEE International Symposium on Circuits and Systems

JF - Proceedings - IEEE International Symposium on Circuits and Systems

Y2 - 25 May 2003 through 28 May 2003

ER -

Design of 2.5V/5V mixed-voltage CMOS I/O buffer with only thin oxide device and dynamic N-well bias circuit

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