Design and Characterization of the Junction Isolation Structure for Monolithic Integration of Planar CMOS and Vertical Power MOSFET on 4H-SiC up to 300 °C

  • Bing Yue Tsui*
  • , Te Kai Tsai
  • , Chia Lung Hung
  • , Yu Xin Wen
    • *Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

11 Scopus citations

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