Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator

Vivek Parmar; Franz Müller; Jing Hua Hsuen; Sandeep Kaur Kingra; Nellie Laleni; Yannick Raffel; Maximilian Lederer; Alptekin Vardar; Konrad Seidel; Taha Soliman; Tobias Kirchner; Tarek Ali; Stefan Dünkel; Sven Beyer; Tian Li Wu; Sourav De; Manan Suri; Thomas Kämpfe

doi:10.1002/aisy.202200389

Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator

Vivek Parmar, Franz Müller, Jing Hua Hsuen, Sandeep Kaur Kingra, Nellie Laleni, Yannick Raffel, Maximilian Lederer, Alptekin Vardar, Konrad Seidel, Taha Soliman, Tobias Kirchner, Tarek Ali, Stefan Dünkel, Sven Beyer, Tian Li Wu^*, Sourav De^*, Manan Suri^*, Thomas Kämpfe

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

Harnessing multibit precision in nonvolatile memory (NVM)-based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. Herein, 1) evaluation of novel differential mode ferroelectric field-effect transistor (DM-FeFET) bitcell on a crossbar array of 4 K devices; 2) validation of weighted sum operation on 28 nm DM-FeFET crossbar array; 3) bit density of 223Mb mm⁻², which is ≈2× improvement compared to conventional FeFET array; 4) 196 TOPS/W energy efficiency for VGG-8 network; and 5) superior bit error rate (BER) resilience showing ≈94% training and 88% inference accuracy with 1% BER are demonstrated.

Original language	English
Article number	2200389
Journal	Advanced Intelligent Systems
Volume	5
Issue number	6
DOIs	https://doi.org/10.1002/aisy.202200389
State	Published - Jun 2023

Keywords

convolutional neural network (CNN)
ferroelectric field-effect transistor (FeFET)
in-memory computing (IMC)
nonvolatile memory (NVM)

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1002/aisy.202200389

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Parmar, V., Müller, F., Hsuen, J. H., Kingra, S. K., Laleni, N., Raffel, Y., Lederer, M., Vardar, A., Seidel, K., Soliman, T., Kirchner, T., Ali, T., Dünkel, S., Beyer, S., Wu, T. L., De, S., Suri, M., & Kämpfe, T. (2023). Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator. Advanced Intelligent Systems, 5(6), Article 2200389. https://doi.org/10.1002/aisy.202200389

@article{0d4cde97f78f4dd08e08ecddf907fc63,

title = "Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator",

abstract = "Harnessing multibit precision in nonvolatile memory (NVM)-based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. Herein, 1) evaluation of novel differential mode ferroelectric field-effect transistor (DM-FeFET) bitcell on a crossbar array of 4 K devices; 2) validation of weighted sum operation on 28 nm DM-FeFET crossbar array; 3) bit density of 223Mb mm−2, which is ≈2× improvement compared to conventional FeFET array; 4) 196 TOPS/W energy efficiency for VGG-8 network; and 5) superior bit error rate (BER) resilience showing ≈94% training and 88% inference accuracy with 1% BER are demonstrated.",

keywords = "convolutional neural network (CNN), ferroelectric field-effect transistor (FeFET), in-memory computing (IMC), nonvolatile memory (NVM)",

author = "Vivek Parmar and Franz M{\"u}ller and Hsuen, {Jing Hua} and Kingra, {Sandeep Kaur} and Nellie Laleni and Yannick Raffel and Maximilian Lederer and Alptekin Vardar and Konrad Seidel and Taha Soliman and Tobias Kirchner and Tarek Ali and Stefan D{\"u}nkel and Sven Beyer and Wu, {Tian Li} and Sourav De and Manan Suri and Thomas K{\"a}mpfe",

note = "Publisher Copyright: {\textcopyright} 2023 The Authors. Advanced Intelligent Systems published by Wiley-VCH GmbH.",

year = "2023",

month = jun,

doi = "10.1002/aisy.202200389",

language = "English",

volume = "5",

journal = "Advanced Intelligent Systems",

issn = "2640-4567",

publisher = "John Wiley and Sons Inc.",

number = "6",

}

Parmar, V, Müller, F, Hsuen, JH, Kingra, SK, Laleni, N, Raffel, Y, Lederer, M, Vardar, A, Seidel, K, Soliman, T, Kirchner, T, Ali, T, Dünkel, S, Beyer, S, Wu, TL, De, S, Suri, M & Kämpfe, T 2023, 'Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator', Advanced Intelligent Systems, vol. 5, no. 6, 2200389. https://doi.org/10.1002/aisy.202200389

Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator. / Parmar, Vivek; Müller, Franz; Hsuen, Jing Hua et al.
In: Advanced Intelligent Systems, Vol. 5, No. 6, 2200389, 06.2023.

Research output: Contribution to journal › Article › peer-review

TY - JOUR

T1 - Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator

AU - Parmar, Vivek

AU - Müller, Franz

AU - Hsuen, Jing Hua

AU - Kingra, Sandeep Kaur

AU - Laleni, Nellie

AU - Raffel, Yannick

AU - Lederer, Maximilian

AU - Vardar, Alptekin

AU - Seidel, Konrad

AU - Soliman, Taha

AU - Kirchner, Tobias

AU - Ali, Tarek

AU - Dünkel, Stefan

AU - Beyer, Sven

AU - Wu, Tian Li

AU - De, Sourav

AU - Suri, Manan

AU - Kämpfe, Thomas

PY - 2023/6

Y1 - 2023/6

N2 - Harnessing multibit precision in nonvolatile memory (NVM)-based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. Herein, 1) evaluation of novel differential mode ferroelectric field-effect transistor (DM-FeFET) bitcell on a crossbar array of 4 K devices; 2) validation of weighted sum operation on 28 nm DM-FeFET crossbar array; 3) bit density of 223Mb mm−2, which is ≈2× improvement compared to conventional FeFET array; 4) 196 TOPS/W energy efficiency for VGG-8 network; and 5) superior bit error rate (BER) resilience showing ≈94% training and 88% inference accuracy with 1% BER are demonstrated.

AB - Harnessing multibit precision in nonvolatile memory (NVM)-based synaptic core can accelerate multiply and accumulate (MAC) operation of deep neural network (DNN). However, NVM-based synaptic cores suffer from the trade-off between bit density and performance. The undesired performance degradation with scaling, limited bit precision, and asymmetry associated with weight update poses a severe bottleneck in realizing a high-density synaptic core. Herein, 1) evaluation of novel differential mode ferroelectric field-effect transistor (DM-FeFET) bitcell on a crossbar array of 4 K devices; 2) validation of weighted sum operation on 28 nm DM-FeFET crossbar array; 3) bit density of 223Mb mm−2, which is ≈2× improvement compared to conventional FeFET array; 4) 196 TOPS/W energy efficiency for VGG-8 network; and 5) superior bit error rate (BER) resilience showing ≈94% training and 88% inference accuracy with 1% BER are demonstrated.

KW - convolutional neural network (CNN)

KW - ferroelectric field-effect transistor (FeFET)

KW - in-memory computing (IMC)

KW - nonvolatile memory (NVM)

UR - http://www.scopus.com/inward/record.url?scp=85165801319&partnerID=8YFLogxK

U2 - 10.1002/aisy.202200389

DO - 10.1002/aisy.202200389

M3 - Article

AN - SCOPUS:85165801319

SN - 2640-4567

VL - 5

JO - Advanced Intelligent Systems

JF - Advanced Intelligent Systems

IS - 6

M1 - 2200389

ER -

Demonstration of Differential Mode Ferroelectric Field-Effect Transistor Array-Based in-Memory Computing Macro for Realizing Multiprecision Mixed-Signal Artificial Intelligence Accelerator

Abstract

Keywords

UN SDGs

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