@inproceedings{e5cd59146cba4ce396df897ab6798699,
title = "Data compression and VLSI implementation neuroprocessor",
abstract = "VLSI data compression research has been motivated by the needs of high-speed high-performance data compression and inspired by the VLSI technologies. An integrated data compression system has been proposed to provide adaptive multi-mode data compression for an advanced multi-instrument spacecraft payload system that has various source data. It combines a high-ratio lossy data compressor with a lossless data compressor to provide various compression schemes. The embedded lossy compressor is a high-speed neuroprocessor for adaptive vector quantization based upon a frequency-sensitive self-organization neural algorithm. The embedded lossless compressor is a high-speed pipelined processor design based on the Rice algorithm.",
author = "Fang, {W. C.}",
year = "1993",
month = jan,
day = "1",
doi = "10.1109/ASIC.1993.410846",
language = "English",
series = "Proceedings - 6th Annual IEEE International ASIC Conference and Exhibit, ASIC 1993",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "570--579",
booktitle = "Proceedings - 6th Annual IEEE International ASIC Conference and Exhibit, ASIC 1993",
address = "United States",
note = "6th Annual IEEE International ASIC Conference and Exhibit, ASIC 1993 ; Conference date: 27-09-1993 Through 01-10-1993",
}