Compressed sensing recovery algorithms and VLSI implementation

Kuan Ting Lin, Kai Jiun Yang, Pu Hsuan Lin, Shang-Ho Tsai

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper proposes two recovery algorithms modified from subspace pursuit(SP) for compressed sensing problems. These algorithms can reduce the complexity of SP and maintain high recovery rate. Complexity analysis and simulation results are provided to demonstrate the improvements. Additionally this work has implemented the VLSI circuit APR of the proposed algorithm using TSMC 90 nm process. The target clock frequency is 100MHz, and the corresponding APR dimension is 11.69μμ2. Based on the post-layout simulation the average power consumption is 431 mW.

Original languageEnglish
Title of host publication2013 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA 2013
DOIs
StatePublished - 2013
Event2013 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA 2013 - Kaohsiung, Taiwan
Duration: 29 Oct 20131 Nov 2013

Publication series

Name2013 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA 2013

Conference

Conference2013 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA 2013
Country/TerritoryTaiwan
CityKaohsiung
Period29/10/131/11/13

Fingerprint

Dive into the research topics of 'Compressed sensing recovery algorithms and VLSI implementation'. Together they form a unique fingerprint.

Cite this