Compact on-chip ECC for low cost flash memories

Toru Tanzawa; Tomoharu Tanaka; Ken Takeuchi; Shirota Riichiro; Seiichi Aritome; Hiroshi Watanabe; Gertjan Hemink; Kazuhiro Shimizu; Shinji Sato; Yuji Takeuchi; Kazunori Ohuchi

doi:10.1109/VLSIC.1996.507722

Compact on-chip ECC for low cost flash memories

Toru Tanzawa^*, Tomoharu Tanaka, Ken Takeuchi, Shirota Riichiro, Seiichi Aritome, Hiroshi Watanabe, Gertjan Hemink, Kazuhiro Shimizu, Shinji Sato, Yuji Takeuchi, Kazunori Ohuchi

^*Corresponding author for this work

Department of Electrical and Computer Engineering

Research output: Contribution to conference › Paper › peer-review

2 Scopus citations

Abstract

A compact on-chip ECC for low cost Flash memories has been developed to minimize the chip size increase. The proposed on-chip ECC implemented on a 64M NAND Flash memory has suppressed the chip size penalty to 1.9%. Moreover, the cumulative sector error rate can be improved by 4 orders after 10⁶ write/erase cycles.

Original language	English
Pages	74-75
Number of pages	2
DOIs	https://doi.org/10.1109/VLSIC.1996.507722
State	Published - 1996
Event	Proceedings of the 1996 Symposium on VLSI Circuits - Honolulu, HI, USA Duration: 13 Jun 1996 → 15 Jun 1996

Conference

Conference	Proceedings of the 1996 Symposium on VLSI Circuits
City	Honolulu, HI, USA
Period	13/06/96 → 15/06/96

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10.1109/VLSIC.1996.507722

Cite this

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title = "Compact on-chip ECC for low cost flash memories",

abstract = "A compact on-chip ECC for low cost Flash memories has been developed to minimize the chip size increase. The proposed on-chip ECC implemented on a 64M NAND Flash memory has suppressed the chip size penalty to 1.9%. Moreover, the cumulative sector error rate can be improved by 4 orders after 106 write/erase cycles.",

author = "Toru Tanzawa and Tomoharu Tanaka and Ken Takeuchi and Shirota Riichiro and Seiichi Aritome and Hiroshi Watanabe and Gertjan Hemink and Kazuhiro Shimizu and Shinji Sato and Yuji Takeuchi and Kazunori Ohuchi",

year = "1996",

doi = "10.1109/VLSIC.1996.507722",

language = "English",

pages = "74--75",

note = "Proceedings of the 1996 Symposium on VLSI Circuits ; Conference date: 13-06-1996 Through 15-06-1996",

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TY - CONF

T1 - Compact on-chip ECC for low cost flash memories

AU - Tanzawa, Toru

AU - Tanaka, Tomoharu

AU - Takeuchi, Ken

AU - Riichiro, Shirota

AU - Aritome, Seiichi

AU - Watanabe, Hiroshi

AU - Hemink, Gertjan

AU - Shimizu, Kazuhiro

AU - Sato, Shinji

AU - Takeuchi, Yuji

AU - Ohuchi, Kazunori

PY - 1996

Y1 - 1996

N2 - A compact on-chip ECC for low cost Flash memories has been developed to minimize the chip size increase. The proposed on-chip ECC implemented on a 64M NAND Flash memory has suppressed the chip size penalty to 1.9%. Moreover, the cumulative sector error rate can be improved by 4 orders after 106 write/erase cycles.

AB - A compact on-chip ECC for low cost Flash memories has been developed to minimize the chip size increase. The proposed on-chip ECC implemented on a 64M NAND Flash memory has suppressed the chip size penalty to 1.9%. Moreover, the cumulative sector error rate can be improved by 4 orders after 106 write/erase cycles.

UR - http://www.scopus.com/inward/record.url?scp=0029720133&partnerID=8YFLogxK

U2 - 10.1109/VLSIC.1996.507722

DO - 10.1109/VLSIC.1996.507722

M3 - Paper

AN - SCOPUS:0029720133

SP - 74

EP - 75

T2 - Proceedings of the 1996 Symposium on VLSI Circuits

Y2 - 13 June 1996 through 15 June 1996

ER -

Compact on-chip ECC for low cost flash memories

Abstract

Conference

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