Compact layout rule extraction for latchup prevention in a 0.25-μm shallow-trench-isolation silicided bulk CMOS process

  • Ming-Dou Ker
  • , Wen Yu Lo
  • , Tung Yang Chen
  • , Howard Tang
  • , S. S. Chen
  • , M. C. Wang

    Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

    6 Scopus citations

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    Engineering