@inproceedings{1bcc5b58cadf498f8003fcad973ebb96,
title = "CMOS-RRAM based In-Memory Hamming Distance Calculation Technique",
abstract = "We designed a CMOS-RRAM based in-memory Hamming Distance (HD) calculation technique providing additional degree of mismatch as compared to Content Addressable Memories (CAMs). One 2T2R (2-Transistor, 2-RRAM) cell is considered to store a single encoded bit of ternary information, while both the RRAM cells are programmed to complementary resistance states. The net current flowing through the 2T2R unit cell results in the HD. Moreover, the HD for various possible combinations of 16-bit input and stored data was shown through array level circuit simulations with integrated Transimpedence Amplifiers (TIAs) to convert row-wise accumulated current into output voltage. The 2T2R-based technique exhibits minimum 3× area and geq 3.6× power saving as compared to existing CMOSNVM (Non-Volatile Memory) counterparts.",
author = "Manoj Kumar and Wu, {Ming Hung} and Hou, {Tuo Hung} and Manan Suri",
note = "Publisher Copyright: {\textcopyright} 2024 IEEE.; 8th IEEE Electron Devices Technology and Manufacturing Conference, EDTM 2024 ; Conference date: 03-03-2024 Through 06-03-2024",
year = "2024",
doi = "10.1109/EDTM58488.2024.10511908",
language = "English",
series = "IEEE Electron Devices Technology and Manufacturing Conference: Strengthening the Globalization in Semiconductors, EDTM 2024",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "IEEE Electron Devices Technology and Manufacturing Conference",
address = "United States",
}