CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm21.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Ting Jung Chang*, Ang Li, Fei Gao, Tuan Ta, Georgios Tziantzioulis, Yanghui Ou, Moyang Wang, Jinzheng Tu, Kaifeng Xu, Paul J. Jackson, August Ning, Grigory Chirkov, Marcelo Orenes-Vera, Shady Agwa, Xiaoyu Yan, Eric Tang, Jonathan Balkind, Christopher Batten, David Wentzlaff

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

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Computer Science