Board-level ESD of driver ICs on LCD panel

Jen Chou Tseng; Chung Ti Hsu; Chia Ku Tsai; Shu Chuan Chen; Ming-Dou Ker

doi:10.1109/TDMR.2008.2009931

Board-level ESD of driver ICs on LCD panel

Jen Chou Tseng^*, Chung Ti Hsu, Chia Ku Tsai, Shu Chuan Chen, Ming-Dou Ker

^*Corresponding author for this work

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

In this paper, a method utilizing a charged-device model (CDM) test by the tape carrier package or chip-on-film (COF) samples to emulate the real-world board-level CDM or charged-board model (CBM) electrostatic discharge is proposed for large-sized chips such as liquid-crystal display (LCD) driver ICs, which successfully duplicated the same failure by CBM discharging. For small-sized chips, the evaluation board (or printed circuit board) emulation should minimize the parasitic RLC loading of the interconnection on the board to achieve a more accurate CBM discharging. In addition, guidelines regarding chip-level design and layout optimization are proposed and have been successfully implemented to improve the immunity.

Original language	English
Article number	4796376
Pages (from-to)	59-64
Number of pages	6
Journal	IEEE Transactions on Device and Materials Reliability
Volume	9
Issue number	1
DOIs	https://doi.org/10.1109/TDMR.2008.2009931
State	Published - 16 Mar 2009

Keywords

Charged-board model (CBM)
Electrostatic discharge (ESD)

Access to Document

10.1109/TDMR.2008.2009931

Cite this

@article{cec3393e34414d0cb78c5346d2544153,

title = "Board-level ESD of driver ICs on LCD panel",

abstract = "In this paper, a method utilizing a charged-device model (CDM) test by the tape carrier package or chip-on-film (COF) samples to emulate the real-world board-level CDM or charged-board model (CBM) electrostatic discharge is proposed for large-sized chips such as liquid-crystal display (LCD) driver ICs, which successfully duplicated the same failure by CBM discharging. For small-sized chips, the evaluation board (or printed circuit board) emulation should minimize the parasitic RLC loading of the interconnection on the board to achieve a more accurate CBM discharging. In addition, guidelines regarding chip-level design and layout optimization are proposed and have been successfully implemented to improve the immunity.",

keywords = "Charged-board model (CBM), Electrostatic discharge (ESD)",

author = "Tseng, {Jen Chou} and Hsu, {Chung Ti} and Tsai, {Chia Ku} and Chen, {Shu Chuan} and Ming-Dou Ker",

year = "2009",

month = mar,

day = "16",

doi = "10.1109/TDMR.2008.2009931",

language = "English",

volume = "9",

pages = "59--64",

journal = "IEEE Transactions on Device and Materials Reliability",

issn = "1530-4388",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "1",

}

TY - JOUR

T1 - Board-level ESD of driver ICs on LCD panel

AU - Tseng, Jen Chou

AU - Hsu, Chung Ti

AU - Tsai, Chia Ku

AU - Chen, Shu Chuan

AU - Ker, Ming-Dou

PY - 2009/3/16

Y1 - 2009/3/16

N2 - In this paper, a method utilizing a charged-device model (CDM) test by the tape carrier package or chip-on-film (COF) samples to emulate the real-world board-level CDM or charged-board model (CBM) electrostatic discharge is proposed for large-sized chips such as liquid-crystal display (LCD) driver ICs, which successfully duplicated the same failure by CBM discharging. For small-sized chips, the evaluation board (or printed circuit board) emulation should minimize the parasitic RLC loading of the interconnection on the board to achieve a more accurate CBM discharging. In addition, guidelines regarding chip-level design and layout optimization are proposed and have been successfully implemented to improve the immunity.

AB - In this paper, a method utilizing a charged-device model (CDM) test by the tape carrier package or chip-on-film (COF) samples to emulate the real-world board-level CDM or charged-board model (CBM) electrostatic discharge is proposed for large-sized chips such as liquid-crystal display (LCD) driver ICs, which successfully duplicated the same failure by CBM discharging. For small-sized chips, the evaluation board (or printed circuit board) emulation should minimize the parasitic RLC loading of the interconnection on the board to achieve a more accurate CBM discharging. In addition, guidelines regarding chip-level design and layout optimization are proposed and have been successfully implemented to improve the immunity.

KW - Charged-board model (CBM)

KW - Electrostatic discharge (ESD)

UR - http://www.scopus.com/inward/record.url?scp=61849097146&partnerID=8YFLogxK

U2 - 10.1109/TDMR.2008.2009931

DO - 10.1109/TDMR.2008.2009931

M3 - Article

AN - SCOPUS:61849097146

SN - 1530-4388

VL - 9

SP - 59

EP - 64

JO - IEEE Transactions on Device and Materials Reliability

JF - IEEE Transactions on Device and Materials Reliability

IS - 1

M1 - 4796376

ER -

Board-level ESD of driver ICs on LCD panel

Abstract

Keywords

Access to Document

Other files and links

Fingerprint

Cite this