@inbook{02e429d91aef47caaa9d5465ac9a6b2f,
title = "Bias-Induced Instability of 4H-SiC CMOS",
abstract = "4H-SiC complementary metal-oxide-semiconductor (CMOS) devices for control circuit applications have been reported extensively, however, the electrical stability, even with interface optimization processes, degrades significantly after bias stress. In this paper, we performed both positive and negative bias stress on planar SiC NMOSFETs and PMOSFETs fabricated with pure (non-diluted) and N2-diluted NO post-oxidation annealing (POA) processes. The test results indicate the existence of positive hole traps might be the culprit that leads to electrical characteristics instability during operation and pure NO annealing is effective to reduce the instability.",
keywords = "Bias temperature instability (BTI), Post-oxidation annealing (POA), Silicon carbide (SiC)",
author = "Wen, {Yu Xin} and Tsui, {Bing Yue}",
note = "Publisher Copyright: {\textcopyright} 2023 The Author(s). Published by Trans Tech Publications Ltd, Switzerland.",
year = "2023",
doi = "10.4028/p-t5m16p",
language = "English",
series = "Materials Science Forum",
publisher = "Trans Tech Publications Ltd.",
pages = "103--107",
booktitle = "Materials Science Forum",
address = "Switzerland",
}