TY - GEN
T1 - Benchmarking of Monolayer and Bilayer Two-Dimensional Transition Metal Dichalcogenide (TMD) Based Logic Circuits and 6T SRAM Cells
AU - Yu, Chang Hung
AU - Su, Pin
AU - Chuang, Ching Te
N1 - Publisher Copyright:
© 2016 ACM.
PY - 2016/8/8
Y1 - 2016/8/8
N2 - We evaluate and benchmark the performance of logic circuits and stability/performance of 6T SRAM cells using monolayer and bilayer TMD devices based on ITRS 2028 (5.9nm) technology node. For the performance benchmarking of logic circuits, the tradeoff between electrostatic integrity (monolayer favored) and carrier mobility (bilayer favored), and the issues regarding the uncertainties in the mobility ratio and source/drain series resistance, the underlap device design, and the off-current spec., etc. are comprehensively addressed. In the evaluation of SRAM cells, the cell immunity to random variations is focused. Besides, the impact of high RSD of TMD materials on RSNM variability is also investigated. The source/drain underlap design is shown to alleviate the larger variability of bilayer SRAM cells. Finally, with superior electrostatics and immunity to random variations, the monolayer TMD devices are favored for low-power logic and SRAM applications; while the bilayer devices, with higher carrier mobility, are more suitable for high-performance logic and SRAM applications.
AB - We evaluate and benchmark the performance of logic circuits and stability/performance of 6T SRAM cells using monolayer and bilayer TMD devices based on ITRS 2028 (5.9nm) technology node. For the performance benchmarking of logic circuits, the tradeoff between electrostatic integrity (monolayer favored) and carrier mobility (bilayer favored), and the issues regarding the uncertainties in the mobility ratio and source/drain series resistance, the underlap device design, and the off-current spec., etc. are comprehensively addressed. In the evaluation of SRAM cells, the cell immunity to random variations is focused. Besides, the impact of high RSD of TMD materials on RSNM variability is also investigated. The source/drain underlap design is shown to alleviate the larger variability of bilayer SRAM cells. Finally, with superior electrostatics and immunity to random variations, the monolayer TMD devices are favored for low-power logic and SRAM applications; while the bilayer devices, with higher carrier mobility, are more suitable for high-performance logic and SRAM applications.
KW - 6T SRAM cells
KW - Two-dimensional (2D) materials
KW - bilayer
KW - logic circuits
KW - low-power
KW - monolayer
KW - transition metal dichalcogenide (TMD)
KW - variability
UR - http://www.scopus.com/inward/record.url?scp=85045520547&partnerID=8YFLogxK
U2 - 10.1145/2934583.2934630
DO - 10.1145/2934583.2934630
M3 - Conference contribution
AN - SCOPUS:85045520547
T3 - Proceedings of the International Symposium on Low Power Electronics and Design
SP - 242
EP - 247
BT - ISLPED 2016 - Proceedings of the 2016 International Symposium on Low Power Electronics and Design
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 21st IEEE/ACM International Symposium on Low Power Electronics and Design, ISLPED 2016
Y2 - 8 August 2016 through 10 August 2016
ER -