Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W

Jen Chive Tsai; Chun Yen Chen; Yi Ting Chen; Chia Lung Ni; Yi Ping Su; Ke-Horng Chen; Yu Wen Chen; Chao Chiun Liang; Chang An Ho; Tun Hao Yu

doi:10.1109/IPEC.2012.6522667

Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W

Jen Chive Tsai, Chun Yen Chen, Yi Ting Chen, Chia Lung Ni, Yi Ping Su, Ke-Horng Chen, Yu Wen Chen, Chao Chiun Liang, Chang An Ho, Tun Hao Yu

Department of Electrical and Computer Engineering

Research output: Contribution to conference › Paper › peer-review

1 Scopus citations

Abstract

The proposed automatic loading detection (ALD) technique keeps high efficiency in interleaving power factor correction (PFC) over a wide load range. With the advantages of small input/output filter and output ripple in the interleaving mechanism, the improved efficiency by the ALD technique at light loads due to reduced switching loss can be widely used in the adapter of portable electronics. The ALD technique can calculate the power by the detection of peak input voltage to reduce the switching loss since the slave channel can be completely turned off for power saving at light loads. Therefore, the boundary control mode (BCM) control can simultaneously provide high power and keep high conversion efficiency both at light and heavy loads. The highly integrated PFC controller fabricated in TSMC 800V UHV process shows high efficiency of 92% over a wide output power of 180 W.

Original language	American English
Pages	229-232
Number of pages	4
DOIs	https://doi.org/10.1109/IPEC.2012.6522667
State	Published - 1 Dec 2012
Event	2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012 - Kobe, Japan Duration: 12 Nov 2012 → 14 Nov 2012

Conference

Conference	2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012
Country/Territory	Japan
City	Kobe
Period	12/11/12 → 14/11/12

Keywords

automatic loading detection (ALD) technique
interleaving power factor correction (PFC)
switching power loss

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10.1109/IPEC.2012.6522667

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Tsai, J. C., Chen, C. Y., Chen, Y. T., Ni, C. L., Su, Y. P., Chen, K.-H., Chen, Y. W., Liang, C. C., Ho, C. A., & Yu, T. H. (2012). Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W. 229-232. Paper presented at 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012, Kobe, Japan. https://doi.org/10.1109/IPEC.2012.6522667

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title = "Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W",

abstract = "The proposed automatic loading detection (ALD) technique keeps high efficiency in interleaving power factor correction (PFC) over a wide load range. With the advantages of small input/output filter and output ripple in the interleaving mechanism, the improved efficiency by the ALD technique at light loads due to reduced switching loss can be widely used in the adapter of portable electronics. The ALD technique can calculate the power by the detection of peak input voltage to reduce the switching loss since the slave channel can be completely turned off for power saving at light loads. Therefore, the boundary control mode (BCM) control can simultaneously provide high power and keep high conversion efficiency both at light and heavy loads. The highly integrated PFC controller fabricated in TSMC 800V UHV process shows high efficiency of 92% over a wide output power of 180 W.",

keywords = "automatic loading detection (ALD) technique, interleaving power factor correction (PFC), switching power loss",

author = "Tsai, {Jen Chive} and Chen, {Chun Yen} and Chen, {Yi Ting} and Ni, {Chia Lung} and Su, {Yi Ping} and Ke-Horng Chen and Chen, {Yu Wen} and Liang, {Chao Chiun} and Ho, {Chang An} and Yu, {Tun Hao}",

year = "2012",

month = dec,

day = "1",

doi = "10.1109/IPEC.2012.6522667",

language = "American English",

pages = "229--232",

note = "2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012 ; Conference date: 12-11-2012 Through 14-11-2012",

}

Tsai, JC, Chen, CY, Chen, YT, Ni, CL, Su, YP, Chen, K-H, Chen, YW, Liang, CC, Ho, CA & Yu, TH 2012, 'Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W', Paper presented at 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012, Kobe, Japan, 12/11/12 - 14/11/12 pp. 229-232. https://doi.org/10.1109/IPEC.2012.6522667

Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W. / Tsai, Jen Chive; Chen, Chun Yen; Chen, Yi Ting et al.
2012. 229-232 Paper presented at 2012 IEEE Asian Solid-State Circuits Conference, A-SSCC 2012, Kobe, Japan.

Research output: Contribution to conference › Paper › peer-review

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T1 - Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W

AU - Tsai, Jen Chive

AU - Chen, Chun Yen

AU - Chen, Yi Ting

AU - Ni, Chia Lung

AU - Su, Yi Ping

AU - Chen, Ke-Horng

AU - Chen, Yu Wen

AU - Liang, Chao Chiun

AU - Ho, Chang An

AU - Yu, Tun Hao

PY - 2012/12/1

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N2 - The proposed automatic loading detection (ALD) technique keeps high efficiency in interleaving power factor correction (PFC) over a wide load range. With the advantages of small input/output filter and output ripple in the interleaving mechanism, the improved efficiency by the ALD technique at light loads due to reduced switching loss can be widely used in the adapter of portable electronics. The ALD technique can calculate the power by the detection of peak input voltage to reduce the switching loss since the slave channel can be completely turned off for power saving at light loads. Therefore, the boundary control mode (BCM) control can simultaneously provide high power and keep high conversion efficiency both at light and heavy loads. The highly integrated PFC controller fabricated in TSMC 800V UHV process shows high efficiency of 92% over a wide output power of 180 W.

AB - The proposed automatic loading detection (ALD) technique keeps high efficiency in interleaving power factor correction (PFC) over a wide load range. With the advantages of small input/output filter and output ripple in the interleaving mechanism, the improved efficiency by the ALD technique at light loads due to reduced switching loss can be widely used in the adapter of portable electronics. The ALD technique can calculate the power by the detection of peak input voltage to reduce the switching loss since the slave channel can be completely turned off for power saving at light loads. Therefore, the boundary control mode (BCM) control can simultaneously provide high power and keep high conversion efficiency both at light and heavy loads. The highly integrated PFC controller fabricated in TSMC 800V UHV process shows high efficiency of 92% over a wide output power of 180 W.

KW - automatic loading detection (ALD) technique

KW - interleaving power factor correction (PFC)

KW - switching power loss

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ER -

Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W

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Keywords

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