Analyzing cache performance on multi-stream execution processor

Chih Zong Lin; Chien-Chao Tseng; Chung-Ping Chung

doi:10.1109/TENCON.1993.319914

Analyzing cache performance on multi-stream execution processor

Chih Zong Lin^*, Chien-Chao Tseng, Chung-Ping Chung

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In this paper, effect of multi-stream (or multithreaded) execution on the performance of cache system is presented. Parameters considered include cache size, line size, set associativity, and unification of instruction/data. The results presented in this paper can be used when designing a multithreaded processor system.

Original language	English
Title of host publication	Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering
Publisher	Publ by IEEE
Pages	1-4
Number of pages	4
ISBN (Print)	0780312333
DOIs	https://doi.org/10.1109/TENCON.1993.319914
State	Published - 1993
Event	Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5) - Beijing, China Duration: 19 Oct 1993 → 21 Oct 1993

Publication series

Name	Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

Conference

Conference	Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5)
City	Beijing, China
Period	19/10/93 → 21/10/93

Access to Document

10.1109/TENCON.1993.319914

Cite this

Lin, C. Z., Tseng, C.-C., & Chung, C.-P. (1993). Analyzing cache performance on multi-stream execution processor. In Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering (pp. 1-4). (Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering). Publ by IEEE. https://doi.org/10.1109/TENCON.1993.319914

@inproceedings{e9458fbcffdc40538983c3a2a424ae44,

title = "Analyzing cache performance on multi-stream execution processor",

abstract = "In this paper, effect of multi-stream (or multithreaded) execution on the performance of cache system is presented. Parameters considered include cache size, line size, set associativity, and unification of instruction/data. The results presented in this paper can be used when designing a multithreaded processor system.",

author = "Lin, {Chih Zong} and Chien-Chao Tseng and Chung-Ping Chung",

year = "1993",

doi = "10.1109/TENCON.1993.319914",

language = "English",

isbn = "0780312333",

series = "Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering",

publisher = "Publ by IEEE",

pages = "1--4",

booktitle = "Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering",

note = "Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5) ; Conference date: 19-10-1993 Through 21-10-1993",

}

Lin, CZ, Tseng, C-C & Chung, C-P 1993, Analyzing cache performance on multi-stream execution processor. in Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering, Publ by IEEE, pp. 1-4, Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5), Beijing, China, 19/10/93. https://doi.org/10.1109/TENCON.1993.319914

Analyzing cache performance on multi-stream execution processor. / Lin, Chih Zong; Tseng, Chien-Chao; Chung, Chung-Ping.
Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering. Publ by IEEE, 1993. p. 1-4 (Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Analyzing cache performance on multi-stream execution processor

AU - Lin, Chih Zong

AU - Tseng, Chien-Chao

AU - Chung, Chung-Ping

PY - 1993

Y1 - 1993

N2 - In this paper, effect of multi-stream (or multithreaded) execution on the performance of cache system is presented. Parameters considered include cache size, line size, set associativity, and unification of instruction/data. The results presented in this paper can be used when designing a multithreaded processor system.

AB - In this paper, effect of multi-stream (or multithreaded) execution on the performance of cache system is presented. Parameters considered include cache size, line size, set associativity, and unification of instruction/data. The results presented in this paper can be used when designing a multithreaded processor system.

UR - http://www.scopus.com/inward/record.url?scp=0027874726&partnerID=8YFLogxK

U2 - 10.1109/TENCON.1993.319914

DO - 10.1109/TENCON.1993.319914

M3 - Conference contribution

AN - SCOPUS:0027874726

SN - 0780312333

T3 - Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

SP - 1

EP - 4

BT - Proceedings of the 10th IEEE Region Conference on Computer, Communication, Control and Power Engineering

PB - Publ by IEEE

T2 - Proceedings of the 1993 IEEE Region 10 Conference on Computer, Communication, Control and Power Engineering (TENCON '93). Part 1 (of 5)

Y2 - 19 October 1993 through 21 October 1993

ER -

Analyzing cache performance on multi-stream execution processor

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