@inproceedings{01a231b3036f4525ba2cc18dad198994,
title = "Analog layout synthesis with knowledge mining",
abstract = "To reduce layout design time, analog layout designers prefer referring to legacy designs and layouts rather than starting from scratch, or thoroughly applying placement and routing tools because legacy layouts contain pretty much design expertise. Therefore, this paper presents the first knowledge-based layout synthesis methodology to generate new layouts by integrating existent design expertise contained in the quality-approved legacy layouts as much as possible. Experimental results show that the proposed methodology with knowledge mining can achieve high layout reusage rate and hence the designers' layout preference can be successfully reserved.",
author = "Wu, {Po Hsun} and Po-Hung Lin and Ho, {Tsung Yi}",
year = "2015",
month = aug,
day = "24",
doi = "10.1109/ECCTD.2015.7300111",
language = "English",
series = "2015 European Conference on Circuit Theory and Design, ECCTD 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "9--12",
booktitle = "2015 European Conference on Circuit Theory and Design, ECCTD 2015",
address = "United States",
note = "European Conference on Circuit Theory and Design, ECCTD 2015 ; Conference date: 24-08-2015 Through 26-08-2015",
}