An ultra-thin polycrystalline-silicon thin-film transistor with SiGe raised source/drain

Du Zen Peng*, Po Sheng Shih, Hsiao-Wen Zan, Ta Shun Liao, Chun Yen Chang

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

2 Scopus citations

Abstract

An ultra-thin poly-Si thin film transistor (Poly-Si TFT) with SiGe raised source/Drain (SiGe RSD) was fabricated. The raised source and drain regions were selectively grown by ultra-high vacuum chemical vapor deposition (UHVCVD) at 550°C. The resultant transistor has an ultra-thin channel region with thickness of 20nm and a self-aligned thick S/D region, Which leads to better performance. With this structure, the turn-on current in the I-V characteristics increases dramatically and the drain breakdown voltage is increases as well, compared with conventional thin-channel poly-Si TFTs.

Original languageEnglish
Title of host publicationEuropean Solid-State Device Research Conference
EditorsElena Gnani, Giorgio Baccarani, Massimo Rudan
PublisherIEEE Computer Society
Pages535-538
Number of pages4
ISBN (Electronic)8890084782
DOIs
StatePublished - 2002
Event32nd European Solid-State Device Research Conference, ESSDERC 2002 - Firenze, Italy
Duration: 24 Sep 200226 Sep 2002

Publication series

NameEuropean Solid-State Device Research Conference
ISSN (Print)1930-8876

Conference

Conference32nd European Solid-State Device Research Conference, ESSDERC 2002
Country/TerritoryItaly
CityFirenze
Period24/09/0226/09/02

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