An innovative successive approximation register analog-to-digital converter for a nine-axis sensing system

Chih Hsuan Lin*, Kuei Ann Wen

*Corresponding author for this work

    Research output: Contribution to journalArticlepeer-review

    1 Scopus citations

    Abstract

    With nine-axis sensing systems in 5G smartphones, mobile power consumption has become increasingly important, and ultra-low-power (ULP) sensor circuits can decrease power consumption to tens of microwatts. This paper presents an innovative successive approximation register analog-to-digital converter, which comprises fine (three most significant bits (MSBs) plus course conversion (11 least significant bits (LSBs)) capacitive digital-to-analog converters (CDACs), ULP, four-mode reconfigurable resolution (9, 10, 11, or 12 bits), an internally generated clock, meta-detection, the switching base midpoint voltage (Vm) (SW-B-M), bit control logic, multi-phase control logic, fine (three MSBs) plus course conversion (11 LSBs) switch control logic, phase control logic, and an input signal plus negative voltage (VI + NEG) voltage generator. Then, the mechanism of the discrete Fourier transform (DFT)-based calibration is applied. The scalable voltage technique was used, and the analog/digital voltage was Vanalog (1.5 V) and Vdigital (0.9 V) to meet the specifications of the nine-axis ULP sensing system. The CDACs can reconfigure four-mode resolutions, 9–12 bits, for use in nine-axis sensor applications. The corresponding dynamic signal-to-noise and distortion ratio performance was 50.78, 58.53, 62.42, and 66.51 dB. In the 12-bit mode, the power consumption of the ADC was approximately 2.7 µW, and the corresponding figure of merit (FoM) was approximately 30.5 fJ for each conversion step.

    Original languageEnglish
    Article number3
    Pages (from-to)1-24
    Number of pages24
    JournalJournal of Low Power Electronics and Applications
    Volume11
    Issue number1
    DOIs
    StatePublished - Mar 2021

    Keywords

    • DFT-based
    • Fine (3 MSBs) plus course conversion (11 LSBs) CDAC
    • Reconfigurable
    • SAR-ADC

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