An Energy-Efficient Ring-Based CIM Accelerator using High-Linearity eNVM for Deep Neural Networks

Computation-in-memory (CIM) accelerators reduce the energy consumption of weight accesses from off-chip memory by storing synaptic weights into on-chip embedded NVM (eNVM) devices, such as RRAM, charge-Trap transistor and FeFET. However, for mapping a deep neural network (DNN) more than 20 layers into an eNVM-based accelerator, the throughput, energy-efficiency and accuracy are limited due to the non-linearity of weights and energy-consuming weight updating. In this work, the proposed CIM accelerator exploits low-voltage and high-linearity eNVM to reach both the power efficiency of weight updating and the high accuracy. By adopting the layer-level weight stationary, mini-Array clusters and a ring-based architecture, the resource utilization of eNVM devices is increased. In addition, channel-wise weight mapping schemes for standard convolution and pointwise convolution can support the structure pruning technique of DNNs. The proposed accelerator achieves 1.814 TOPS/W with only 4.7% accuracy loss on YOLOv3 by Ni-crystal RRAM.