An embedded coherent-multithreading multimedia processor and its programming model

Jui Chin Chu*, Wei Chun Ku, Shu Hsuan Chou, Tien-Fu Chen, Jiun-In Guo

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

Multithreading and multi-core processing have been shown to be powerful approaches for boosting a system performance by taking advantage of parallelism in applications. This paper presents a processor design by unifying RISC and multithreading DSP for the sophisticated multimedia applications with advanced standards such as H.264. The proposed design not only minimizes integration costs for embedded multithreading/multi-core design by independent coherent threads, but also reduces the memory bandwidth requirements by one-stop streaming buffer and a very fast data exchange mechanism. With the proposed techniques and appropriate programming model, we can achieve 78% reduction of memory bandwidth and 89% reduction of processing time in H.264 video encoding, compared to traditional single stream micro-processor.

Original languageEnglish
Title of host publication2007 44th ACM/IEEE Design Automation Conference, DAC'07
Pages652-657
Number of pages6
DOIs
StatePublished - 2007
Event2007 44th ACM/IEEE Design Automation Conference, DAC'07 - San Diego, CA, United States
Duration: 4 Jun 20078 Jun 2007

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference2007 44th ACM/IEEE Design Automation Conference, DAC'07
Country/TerritoryUnited States
CitySan Diego, CA
Period4/06/078/06/07

Keywords

  • H.264
  • Multimedia processor
  • Multithreading
  • Programming model
  • VisoMT

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