An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm

Wei Yeh Shih; Kuan Ju Huang; Chiu Kuo Chen; Wai-Chi  Fang; Gert Cauwenberghs; Tzyy Ping Jung

doi:10.1109/BioCAS.2012.6418464

An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm

Wei Yeh Shih^*, Kuan Ju Huang, Chiu Kuo Chen, Wai-Chi Fang, Gert Cauwenberghs, Tzyy Ping Jung

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

8 Scopus citations

Abstract

This paper presents an effective chip implementation of a real-time eight-channel electroencephalogram signal processor based on on-line recursive independent component analysis (ORICA) algorithm. The system architecture is composed of a memory unit, a whitening unit, an ORICA training unit, and an ORICA computation unit. The proposed architecture is implemented using TSMC 90 nm CMOS technology. It occupies a core area of 800×800 μm² and consumes 4.18 mW at a core supply voltage of 1.0 V and 50 MHz clock operating frequency. Simulated super and sub-Gaussian signals are used to verify the system. The separated signals match those obtained using off-line Matlab-based analysis.

Original language	English
Title of host publication	2012 IEEE Biomedical Circuits and Systems Conference
Subtitle of host publication	Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications
Pages	192-195
Number of pages	4
DOIs	https://doi.org/10.1109/BioCAS.2012.6418464
State	Published - 1 Dec 2012
Event	2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Hsinchu, Taiwan Duration: 28 Nov 2012 → 30 Nov 2012

Publication series

Name	2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications

Conference

Conference	2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012
Country/Territory	Taiwan
City	Hsinchu
Period	28/11/12 → 30/11/12

Access to Document

10.1109/BioCAS.2012.6418464

Cite this

Shih, W. Y., Huang, K. J., Chen, C. K., Fang, W-C., Cauwenberghs, G., & Jung, T. P. (2012). An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm. In 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications (pp. 192-195). Article 6418464 (2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications). https://doi.org/10.1109/BioCAS.2012.6418464

Shih, Wei Yeh ; Huang, Kuan Ju ; Chen, Chiu Kuo et al. / An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm. 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications. 2012. pp. 192-195 (2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications).

@inproceedings{60499e05799947c7b6679183369e5f84,

title = "An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm",

abstract = "This paper presents an effective chip implementation of a real-time eight-channel electroencephalogram signal processor based on on-line recursive independent component analysis (ORICA) algorithm. The system architecture is composed of a memory unit, a whitening unit, an ORICA training unit, and an ORICA computation unit. The proposed architecture is implemented using TSMC 90 nm CMOS technology. It occupies a core area of 800×800 μm2 and consumes 4.18 mW at a core supply voltage of 1.0 V and 50 MHz clock operating frequency. Simulated super and sub-Gaussian signals are used to verify the system. The separated signals match those obtained using off-line Matlab-based analysis.",

author = "Shih, {Wei Yeh} and Huang, {Kuan Ju} and Chen, {Chiu Kuo} and Wai-Chi Fang and Gert Cauwenberghs and Jung, {Tzyy Ping}",

year = "2012",

month = dec,

day = "1",

doi = "10.1109/BioCAS.2012.6418464",

language = "English",

isbn = "9781467322935",

series = "2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications",

pages = "192--195",

booktitle = "2012 IEEE Biomedical Circuits and Systems Conference",

note = "2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 ; Conference date: 28-11-2012 Through 30-11-2012",

}

Shih, WY, Huang, KJ, Chen, CK, Fang, W-C, Cauwenberghs, G & Jung, TP 2012, An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm. in 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications., 6418464, 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications, pp. 192-195, 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012, Hsinchu, Taiwan, 28/11/12. https://doi.org/10.1109/BioCAS.2012.6418464

An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm. / Shih, Wei Yeh; Huang, Kuan Ju; Chen, Chiu Kuo et al.
2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications. 2012. p. 192-195 6418464 (2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm

AU - Shih, Wei Yeh

AU - Huang, Kuan Ju

AU - Chen, Chiu Kuo

AU - Fang, Wai-Chi

AU - Cauwenberghs, Gert

AU - Jung, Tzyy Ping

PY - 2012/12/1

Y1 - 2012/12/1

N2 - This paper presents an effective chip implementation of a real-time eight-channel electroencephalogram signal processor based on on-line recursive independent component analysis (ORICA) algorithm. The system architecture is composed of a memory unit, a whitening unit, an ORICA training unit, and an ORICA computation unit. The proposed architecture is implemented using TSMC 90 nm CMOS technology. It occupies a core area of 800×800 μm2 and consumes 4.18 mW at a core supply voltage of 1.0 V and 50 MHz clock operating frequency. Simulated super and sub-Gaussian signals are used to verify the system. The separated signals match those obtained using off-line Matlab-based analysis.

AB - This paper presents an effective chip implementation of a real-time eight-channel electroencephalogram signal processor based on on-line recursive independent component analysis (ORICA) algorithm. The system architecture is composed of a memory unit, a whitening unit, an ORICA training unit, and an ORICA computation unit. The proposed architecture is implemented using TSMC 90 nm CMOS technology. It occupies a core area of 800×800 μm2 and consumes 4.18 mW at a core supply voltage of 1.0 V and 50 MHz clock operating frequency. Simulated super and sub-Gaussian signals are used to verify the system. The separated signals match those obtained using off-line Matlab-based analysis.

UR - http://www.scopus.com/inward/record.url?scp=84874167804&partnerID=8YFLogxK

U2 - 10.1109/BioCAS.2012.6418464

DO - 10.1109/BioCAS.2012.6418464

M3 - Conference contribution

AN - SCOPUS:84874167804

SN - 9781467322935

T3 - 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications

SP - 192

EP - 195

BT - 2012 IEEE Biomedical Circuits and Systems Conference

T2 - 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012

Y2 - 28 November 2012 through 30 November 2012

ER -

Shih WY, Huang KJ, Chen CK, Fang W-C, Cauwenberghs G, Jung TP. An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm. In 2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications. 2012. p. 192-195. 6418464. (2012 IEEE Biomedical Circuits and Systems Conference: Intelligent Biomedical Electronics and Systems for Better Life and Better Environment, BioCAS 2012 - Conference Publications). doi: 10.1109/BioCAS.2012.6418464

An effective chip implementation of a real-time eight-channel EEG signal processor based on on-line recursive ICA algorithm

Abstract

Publication series

Conference

Access to Document

Other files and links

Fingerprint

Cite this