Amorphous silicon thin-film transistor gate driver circuit design optimization using a simulation-based evolutionary technique

Ying Ju Chiu, Kuo Fu Lee, Ying Chieh Chen, Hui Wen Cheng, Yiming Li*, Tony Chiang, Kuen Yu Huang, Tsau Hua Hsieh

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

In this work, we for the first time optimize dynamic characteristic of amorphous silicon thin-film transistor (TFT) gate (ASG) driver circuits for TFT-LCD panel. The rise time, fall time, power dissipation, and ripple voltage of the ASG driver circuit are optimized using simulation-based evolutionary method which integrates genetic algorithm and circuit simulation on the unified optimization framework [1]. Two different a-Si:H TFT ASG driver circuits are optimized, the first circuit consisting of 14 a-Si:H TFT devices is designed for the specification of the rise time < 1.5 μs, the fall time < 1.5 μs and the ripple voltage < 3 V with the minimization of total layout area. The second one with 8 a-Si:H TFTs is further optimized with the power dissipation < 2 mW. The results of this study successfully met the desired specification; consequently, it benefits manufacturing of TFT-LCD panel.

Original languageEnglish
Title of host publicationICSE 2010 - Proceedings IEEE International Conference on Semiconductor Electronics
Pages123-126
Number of pages4
DOIs
StatePublished - 2010
Event2010 IEEE International Conference on Semiconductor Electronics, ICSE 2010 - Melaka, Malaysia
Duration: 28 Jun 201030 Jun 2010

Publication series

NameIEEE International Conference on Semiconductor Electronics, Proceedings, ICSE

Conference

Conference2010 IEEE International Conference on Semiconductor Electronics, ICSE 2010
Country/TerritoryMalaysia
CityMelaka
Period28/06/1030/06/10

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