All-digital fast-locking pulsewidth-control circuit with programmable duty cycle

Keyphrases

• All-digital 100%
• CMOS Process 25%
• Control Circuit 100%
• Delay Cell 25%
• Delay Line 25%
• Desirable Output 25%
• Digital Detectors 25%
• Duty Cycle 100%
• Fast Lock 100%
• Operating Frequency 25%
• Order of Accuracy 25%
• Programmable Duty Cycle 100%
• Pulse-width Control 100%
• State-of-the-art Techniques 25%
• Time-to-digital 25%
• Two-stage Matrix Converter 25%
• Wide Frequency Range 25%

Engineering

• Desired Output 16%
• Digital Detector 16%
• Duty Cycle 100%
• Electric Delay Lines 16%
• Lookup Table 16%
• Operating Frequency 16%
• State-of-the-Art Method 16%