TY - GEN
T1 - Adaptive on-die termination resistors for high-speed transceiver
AU - Lin, Chih Hsien
AU - Chen, Chih Ning
AU - Jou, Shyh-Jye
PY - 2005
Y1 - 2005
N2 - As the demand of data transmission bandwidth is increased, the issue of impedance matching becomes important factor for the high-speed serial link transceiver. Especially, there are many standards of the characteristic impedance in today's transmission media. We propose a digital approach of on-die adaptive termination resistors in the transceiver. It can match the characteristic impedance of coaxial cable automatically from 75 Ω ∼45 Ω without any external component and bias. Using tsmc 0.18 um CMOS process, the tuning process can be finished in 14 clock cycles and the difference between termination resistor and coaxial cable is less than 5Ω for the range of characteristic impedance from 75 Ω to 45 Ω.
AB - As the demand of data transmission bandwidth is increased, the issue of impedance matching becomes important factor for the high-speed serial link transceiver. Especially, there are many standards of the characteristic impedance in today's transmission media. We propose a digital approach of on-die adaptive termination resistors in the transceiver. It can match the characteristic impedance of coaxial cable automatically from 75 Ω ∼45 Ω without any external component and bias. Using tsmc 0.18 um CMOS process, the tuning process can be finished in 14 clock cycles and the difference between termination resistor and coaxial cable is less than 5Ω for the range of characteristic impedance from 75 Ω to 45 Ω.
UR - http://www.scopus.com/inward/record.url?scp=33745439239&partnerID=8YFLogxK
U2 - 10.1109/VDAT.2005.1500028
DO - 10.1109/VDAT.2005.1500028
M3 - Conference contribution
AN - SCOPUS:33745439239
SN - 0780390601
SN - 9780780390607
T3 - 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
SP - 96
EP - 99
BT - 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
T2 - 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test,(VLSI-TSA-DAT)
Y2 - 27 April 2005 through 29 April 2005
ER -