Abnormal positive bias stress instability of In-Ga-Zn-O thin-film transistors with low-temperature Al2O3 gate dielectric

Yu Hong Chang, Ming Jiue Yu, Ruei Ping Lin, Chih Pin Hsu, Tuo-Hung Hou*

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

47 Scopus citations

Abstract

Low-temperature atomic layer deposition (ALD) was employed to deposit Al2O3 as a gate dielectric in amorphous In-Ga-Zn-O thin-film transistors fabricated at temperatures below 120 °C. The devices exhibited a negligible threshold voltage shift (ΔVT) during negative bias stress, but a more pronounced ΔVT under positive bias stress with a characteristic turnaround behavior from a positive ΔVT to a negative ΔVT. This abnormal positive bias instability is explained using a two-process model, including both electron trapping and hydrogen release and migration. Electron trapping induces the initial positive ΔVT, which can be fitted using the stretched exponential function. The breakage of residual AlO-H bonds in low-temperature ALD Al2O3 is triggered by the energetic channel electrons. The hydrogen atoms then diffuse toward the In-Ga-Zn-O channel and induce the negative ΔVT through electron doping with power-law time dependence. A rapid partial recovery of the negative ΔVT after stress is also observed during relaxation.

Original languageEnglish
Article number033502
Number of pages4
JournalApplied Physics Letters
Volume108
Issue number3
DOIs
StatePublished - 18 Jan 2016

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