A wireless readout front-end device for portable EEG acquisition system

Yi Chung Chen; Zong Han Hsieh; Wai-Chi  Fang

doi:10.1109/ISCE.2013.6570196

A wireless readout front-end device for portable EEG acquisition system

Yi Chung Chen, Zong Han Hsieh, Wai-Chi Fang

Institute of Electronics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Scopus citations

Abstract

In this paper, the 32-channel readout front-end device with a Bluetooth 2.0 module and a MSP430 ultra-low power microcontroller for portable Electroencephalograph (EEG) acquisition is presented. In addition to the consideration of low power, low noise, and high efficient chip area usage, the extendable readout front-end chip is presented with a design of chopper-stabilized differential difference amplifier (CHDDA) for high common mode rejection ratio (CMRR) and the 10-bit successive approximation register analog-to-digital converter (SAR-ADC) for high Signal-to-Noise Ratio (SNR). The power consumption of each readout chip is about 80.268 μW, and the total system is about 134.6 mW under the power supply of ±1.8 V.

Original language	English
Title of host publication	2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013
Pages	223-224
Number of pages	2
DOIs	https://doi.org/10.1109/ISCE.2013.6570196
State	Published - 11 Sep 2013
Event	2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013 - Hsinchu, Taiwan Duration: 3 Jun 2013 → 6 Jun 2013

Publication series

Name	Proceedings of the International Symposium on Consumer Electronics, ISCE

Conference

Conference	2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013
Country/Territory	Taiwan
City	Hsinchu
Period	3/06/13 → 6/06/13

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10.1109/ISCE.2013.6570196

Cite this

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title = "A wireless readout front-end device for portable EEG acquisition system",

abstract = "In this paper, the 32-channel readout front-end device with a Bluetooth 2.0 module and a MSP430 ultra-low power microcontroller for portable Electroencephalograph (EEG) acquisition is presented. In addition to the consideration of low power, low noise, and high efficient chip area usage, the extendable readout front-end chip is presented with a design of chopper-stabilized differential difference amplifier (CHDDA) for high common mode rejection ratio (CMRR) and the 10-bit successive approximation register analog-to-digital converter (SAR-ADC) for high Signal-to-Noise Ratio (SNR). The power consumption of each readout chip is about 80.268 μW, and the total system is about 134.6 mW under the power supply of ±1.8 V.",

author = "Chen, {Yi Chung} and Hsieh, {Zong Han} and Wai-Chi Fang",

year = "2013",

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doi = "10.1109/ISCE.2013.6570196",

language = "English",

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series = "Proceedings of the International Symposium on Consumer Electronics, ISCE",

pages = "223--224",

booktitle = "2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013",

note = "2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013 ; Conference date: 03-06-2013 Through 06-06-2013",

}

Chen, YC, Hsieh, ZH & Fang, W-C 2013, A wireless readout front-end device for portable EEG acquisition system. in 2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013., 6570196, Proceedings of the International Symposium on Consumer Electronics, ISCE, pp. 223-224, 2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013, Hsinchu, Taiwan, 3/06/13. https://doi.org/10.1109/ISCE.2013.6570196

A wireless readout front-end device for portable EEG acquisition system. / Chen, Yi Chung; Hsieh, Zong Han; Fang, Wai-Chi .
2013 IEEE 17th International Symposium on Consumer Electronics, ISCE 2013. 2013. p. 223-224 6570196 (Proceedings of the International Symposium on Consumer Electronics, ISCE).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - In this paper, the 32-channel readout front-end device with a Bluetooth 2.0 module and a MSP430 ultra-low power microcontroller for portable Electroencephalograph (EEG) acquisition is presented. In addition to the consideration of low power, low noise, and high efficient chip area usage, the extendable readout front-end chip is presented with a design of chopper-stabilized differential difference amplifier (CHDDA) for high common mode rejection ratio (CMRR) and the 10-bit successive approximation register analog-to-digital converter (SAR-ADC) for high Signal-to-Noise Ratio (SNR). The power consumption of each readout chip is about 80.268 μW, and the total system is about 134.6 mW under the power supply of ±1.8 V.

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A wireless readout front-end device for portable EEG acquisition system

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